| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1270 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeMem()
1292 int Offset = SignExtend32<9>(Insn >> 7); in DecodeMemEVA()
1313 int Offset = SignExtend32<9>(Insn & 0x1ff); in DecodeLoadByte9()
1331 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeLoadByte15()
1349 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeCacheOp()
1366 int Offset = SignExtend32<12>(Insn & 0xfff); in DecodeCacheOpMM()
1383 int Offset = SignExtend32<9>(Insn & 0x1ff); in DecodePrefeOpMM()
1400 int Offset = SignExtend32<9>(Insn >> 7); in DecodeCacheeOp_CacheOpR6()
1417 int Offset = SignExtend32<9>(Insn & 0x1ff); in DecodeStoreEvaOpMM()
1435 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeSyncI()
[all …]
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| /external/capstone/arch/Mips/ |
| D | MipsDisassembler.c | 982 int Offset = SignExtend32(Insn & 0xffff, 16); in DecodeMem()
1004 int Offset = SignExtend32(Insn & 0xffff, 16); in DecodeCacheOp()
1020 int Offset = SignExtend32(Insn & 0xfff, 12); in DecodeCacheOpMM()
1052 int Offset = SignExtend32(Insn & 0xffff, 16); in DecodeSyncI()
1066 int Offset = SignExtend32(fieldFromInstruction(Insn, 16, 10), 10); in DecodeMSA128Mem()
1194 int Offset = SignExtend32(Insn & 0xf, 4); in DecodeMemMMReglistImm4Lsl2()
1208 int Offset = SignExtend32(Insn & 0x0fff, 12); in DecodeMemMMImm12()
1242 int Offset = SignExtend32(Insn & 0xffff, 16); in DecodeMemMMImm16()
1259 int Offset = SignExtend32(Insn & 0xffff, 16); in DecodeFMem()
1276 int Offset = SignExtend32(Insn & 0xffff, 16); in DecodeFMem2()
[all …]
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| /external/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1536 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeMem()
1558 int Offset = SignExtend32<9>(Insn >> 7); in DecodeMemEVA()
1579 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeLoadByte15()
1597 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeCacheOp()
1614 int Offset = SignExtend32<12>(Insn & 0xfff); in DecodeCacheOpMM()
1631 int Offset = SignExtend32<9>(Insn & 0x1ff); in DecodePrefeOpMM()
1648 int Offset = SignExtend32<9>(Insn >> 7); in DecodeCacheeOp_CacheOpR6()
1665 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeSyncI()
1678 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeSyncI_MM()
1693 int Immediate = SignExtend32<16>(Insn & 0xffff); in DecodeSynciR6()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1536 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeMem()
1558 int Offset = SignExtend32<9>(Insn >> 7); in DecodeMemEVA()
1579 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeLoadByte15()
1597 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeCacheOp()
1614 int Offset = SignExtend32<12>(Insn & 0xfff); in DecodeCacheOpMM()
1631 int Offset = SignExtend32<9>(Insn & 0x1ff); in DecodePrefeOpMM()
1648 int Offset = SignExtend32<9>(Insn >> 7); in DecodeCacheeOp_CacheOpR6()
1665 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeSyncI()
1678 int Offset = SignExtend32<16>(Insn & 0xffff); in DecodeSyncI_MM()
1693 int Immediate = SignExtend32<16>(Insn & 0xffff); in DecodeSynciR6()
[all …]
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| /external/capstone/arch/Sparc/ |
| D | SparcDisassembler.c | 261 simm13 = SignExtend32(fieldFromInstruction_4(insn, 0, 13), 13); in DecodeMem()
364 unsigned tgt = SignExtend32(fieldFromInstruction_4(insn, 0, 13), 13); in DecodeSIMM13()
382 simm13 = SignExtend32(fieldFromInstruction_4(insn, 0, 13), 13); in DecodeJMPL()
417 simm13 = SignExtend32(fieldFromInstruction_4(insn, 0, 13), 13); in DecodeReturn()
449 simm13 = SignExtend32(fieldFromInstruction_4(insn, 0, 13), 13); in DecodeSWAP()
|
| D | SparcInstPrinter.c | 221 Imm = SignExtend32(Imm, 19); in printOperand()
232 Imm = SignExtend32(Imm, 22); in printOperand()
261 Imm = SignExtend32(Imm, 16); in printOperand()
|
| /external/llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| D | LanaiDisassembler.cpp | 181 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeRiMemoryValue()
205 Inst.addOperand(MCOperand::createImm(SignExtend32<10>(Offset))); in decodeSplsValue()
230 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeShiftImm()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/Disassembler/ |
| D | LanaiDisassembler.cpp | 181 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeRiMemoryValue()
205 Inst.addOperand(MCOperand::createImm(SignExtend32<10>(Offset))); in decodeSplsValue()
230 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeShiftImm()
|
| /external/llvm/lib/Target/Lanai/Disassembler/ |
| D | LanaiDisassembler.cpp | 180 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeRiMemoryValue()
204 Inst.addOperand(MCOperand::createImm(SignExtend32<10>(Offset))); in decodeSplsValue()
229 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeShiftImm()
|
| /external/llvm-project/lldb/source/Plugins/Instruction/PPC64/ |
| D | EmulateInstructionPPC64.cpp | 243 int32_t ids = llvm::SignExtend32<16>(ds << 2); in EmulateLD()
286 int32_t ids = llvm::SignExtend32<16>(ds << 2); in EmulateSTD()
378 int32_t si_val = llvm::SignExtend32<16>(si); in EmulateADDI()
|
| /external/llvm-project/llvm/lib/Target/ARC/Disassembler/ |
| D | ARCDisassembler.cpp | 164 Inst.addOperand(MCOperand::createImm(SignExtend32<9>(S9))); in DecodeMEMrs9()
191 DecodeSymbolicOperandOff(Inst, Address, SignExtend32<B>(InsnS), Decoder); in DecodeBranchTargetS()
202 SignExtend32<B>(maskTrailingOnes<decltype(InsnS)>(B) & InsnS))); in DecodeSignedOperand()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/Disassembler/ |
| D | ARCDisassembler.cpp | 164 Inst.addOperand(MCOperand::createImm(SignExtend32<9>(S9))); in DecodeMEMrs9()
191 DecodeSymbolicOperandOff(Inst, Address, SignExtend32<B>(InsnS), Decoder); in DecodeBranchTargetS()
202 SignExtend32<B>(maskTrailingOnes<decltype(InsnS)>(B) & InsnS))); in DecodeSignedOperand()
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| /external/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 389 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeMem()
530 unsigned tgt = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeSIMM13()
544 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeJMPL()
577 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeReturn()
608 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeSWAP()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 381 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeMem()
522 unsigned tgt = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeSIMM13()
536 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeJMPL()
569 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeReturn()
600 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeSWAP()
|
| /external/llvm-project/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 381 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeMem()
522 unsigned tgt = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeSIMM13()
536 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeJMPL()
569 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeReturn()
600 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); in DecodeSWAP()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCInstPrinter.cpp | 338 Value = SignExtend32<5>(Value); in printS5ImmOperand()
410 int32_t Imm = SignExtend32<32>((unsigned)MI->getOperand(OpNo).getImm() << 2); in printBranchOperand()
421 O << SignExtend32<32>((unsigned)MI->getOperand(OpNo).getImm() << 2); in printAbsBranchOperand()
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| /external/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCInstPrinter.cpp | 352 Value = SignExtend32<5>(Value); in printS5ImmOperand()
438 int32_t Imm = SignExtend32<32>((unsigned)MI->getOperand(OpNo).getImm() << 2); in printBranchOperand()
464 O << SignExtend32<32>((unsigned)MI->getOperand(OpNo).getImm() << 2); in printAbsBranchOperand()
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| /external/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| D | RuntimeDyldELF.cpp | 1008 if (SignExtend32<32>(Result) != Result) in resolvePPC64Relocation()
1015 if (SignExtend32<26>(delta) != delta) in resolvePPC64Relocation()
1023 if (SignExtend32<32>(delta) != delta) in resolvePPC64Relocation()
1433 int64_t Addend = Value.Addend + SignExtend32<16>(Opcode & 0x0000ffff); in processRelocationRef()
1458 Value.Addend += SignExtend32<18>((Opcode & 0x0000ffff) << 2); in processRelocationRef()
1460 Value.Addend += SignExtend32<21>((Opcode & 0x0007ffff) << 2); in processRelocationRef()
1462 Value.Addend += SignExtend32<23>((Opcode & 0x001fffff) << 2); in processRelocationRef()
1464 Value.Addend += SignExtend32<28>((Opcode & 0x03ffffff) << 2); in processRelocationRef()
1513 if (SignExtend32<26>(delta) == delta) { in processRelocationRef()
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| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 273 Value = SignExtend32<5>(Value); in printS5ImmOperand()
351 O << SignExtend32<32>((unsigned)MI->getOperand(OpNo).getImm() << 2); in printAbsBranchOperand()
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| /external/llvm-project/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 66 Inst.addOperand(MCOperand::createImm(SignExtend32<14>(Imm))); in decodeCondBrTarget()
73 int32_t Offset = SignExtend32<24>(Imm); in decodeDirectBrTarget()
|
| /external/llvm-project/llvm/lib/Target/BPF/Disassembler/ |
| D | BPFDisassembler.cpp | 134 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeMemoryOpValue()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/Disassembler/ |
| D | BPFDisassembler.cpp | 131 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeMemoryOpValue()
|
| /external/capstone/ |
| D | MathExtras.h | 407 static inline int32_t SignExtend32(uint32_t X, unsigned B) { in SignExtend32() function
|
| /external/llvm/include/llvm/Support/ |
| D | MathExtras.h | 663 template <unsigned B> inline int32_t SignExtend32(uint32_t x) {
669 inline int32_t SignExtend32(uint32_t X, unsigned B) {
|
| /external/llvm-project/llvm/lib/Target/VE/Disassembler/ |
| D | VEDisassembler.cpp | 331 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeASX()
479 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeCAS()
601 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeBranchCondition()
|