Searched refs:SimPRegister (Results 1 – 3 of 3) sorted by relevance
367 SimVRegister Simulator::ExpandToSimVRegister(const SimPRegister& pg) { in ExpandToSimVRegister()375 SimPRegister& pd, in ExtractFromSimVRegister()1087 SimPRegister& ffr = ReadFFR(); in PrintFFR()1135 const SimPRegister& reg, in PrintPartialPRegister()7444 SimPRegister& pg = ReadPRegister(instr->GetPgLow8()); in VisitSVEBitwiseShiftByImm_Predicated()7494 SimPRegister& pg = ReadPRegister(instr->GetPgLow8()); in VisitSVEBitwiseShiftByVector_Predicated()7543 SimPRegister& pg = ReadPRegister(instr->GetPgLow8()); in VisitSVEBitwiseShiftByWideElements_Predicated()7847 SimPRegister& pg = ReadPRegister(instr->GetPgLow8()); in VisitSVEFPAccumulatingReduction()7863 SimPRegister& pg = ReadPRegister(instr->GetPgLow8()); in VisitSVEFPArithmetic_Predicated()7922 SimPRegister& pg = ReadPRegister(instr->GetPgLow8()); in VisitSVEFPArithmeticWithImm_Predicated()[all …]
377 typedef SimRegisterBase<kPRegMaxSize> SimPRegister; // p0-p15 typedef379 typedef SimPRegister SimFFRRegister;403 SimPRegister& other) // NOLINT(runtime/references)(runtime/explicit) in LogicPRegister()494 SimPRegister& register_;1226 SimPRegister& ReadPRegister(unsigned code) {2146 const SimPRegister& reg,2715 SimPRegister& GetPTrue() { return pregister_all_true_; }3365 const SimPRegister& pg,3369 const SimPRegister& pg,3410 const SimPRegister& pg,[all …]
1822 const SimPRegister& pg, in sel()3006 const SimPRegister& pg, in mov_merging()3014 const SimPRegister& pg, in mov_zeroing()3032 SimPRegister all_false; in mov_zeroing()6360 SimPRegister is_neg; in FTMaddHelper()7256 SimPRegister mask; in SVEFaultTolerantLoadHelper()