Searched refs:SpillAlignment (Results 1 – 13 of 13) sorted by relevance
| /external/llvm-project/llvm/utils/TableGen/ |
| D | InfoByHwMode.cpp | 125 SpillAlignment = R->getValueAsInt("SpillAlignment"); in RegSizeInfo()
129 return std::tie(RegSize, SpillSize, SpillAlignment) < in operator <()
130 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment); in operator <()
135 SpillAlignment && I.SpillAlignment % SpillAlignment == 0 && in isSubClassOf()
141 << ",A=" << SpillAlignment << ']'; in writeToStream()
174 return std::tie(A0.SpillSize, A0.SpillAlignment) > in hasStricterSpillThan()
175 std::tie(B0.SpillSize, B0.SpillAlignment); in hasStricterSpillThan()
|
| D | InfoByHwMode.h | 151 unsigned SpillAlignment; member
157 return std::tie(RegSize, SpillSize, SpillAlignment) ==
158 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment);
|
| D | RegisterInfoEmitter.cpp | 1296 << RI.SpillAlignment; in runTargetDesc()
1652 OS << ' ' << getModeName(M) << ':' << RC.RSI.get(M).SpillAlignment; in debugDump()
|
| D | CodeGenRegisters.cpp | 800 RI.SpillAlignment = R->getValueAsInt("Alignment"); in CodeGenRegisterClass()
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.h | 304 unsigned SpillAlignment; variable
408 unsigned SpillAlignment; member
411 : Members(M), SpillSize(S), SpillAlignment(A) {} in Members()
416 SpillAlignment(RC.SpillAlignment) {} in Key()
|
| D | CodeGenRegisters.cpp | 709 SpillAlignment = R->getValueAsInt("Alignment"); in CodeGenRegisterClass()
730 SpillAlignment(Props.SpillAlignment), in CodeGenRegisterClass()
771 OS << "{ S=" << K.SpillSize << ", A=" << K.SpillAlignment; in operator <<()
783 return std::tie(*Members, SpillSize, SpillAlignment) < in operator <()
784 std::tie(*B.Members, B.SpillSize, B.SpillAlignment); in operator <()
798 return A->SpillAlignment && B->SpillAlignment % A->SpillAlignment == 0 && in testSubClass()
825 if (A->SpillAlignment < B->SpillAlignment) in TopoOrderRC()
827 if (A->SpillAlignment > B->SpillAlignment) in TopoOrderRC()
1052 CodeGenRegisterClass::Key K(Members, RC->SpillSize, RC->SpillAlignment); in getOrCreateSubClass()
1894 RC2->SpillAlignment > RC1->SpillAlignment)) in inferCommonSubClass()
|
| D | RegisterInfoEmitter.cpp | 1033 assert((RC.SpillAlignment/8) <= 0xffff && "SpillAlignment too large."); in runMCDesc()
1041 << RC.SpillAlignment/8 << ", " in runMCDesc()
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 233 unsigned RegSize, SpillSize, SpillAlignment; member
284 return getRegClassInfo(RC).SpillAlignment / 8; in getSpillAlignment()
290 return Align(getRegClassInfo(RC).SpillAlignment / 8); in getSpillAlign()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 233 unsigned RegSize, SpillSize, SpillAlignment; member
284 return getRegClassInfo(RC).SpillAlignment / 8; in getSpillAlignment()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | Target.td | 63 int SpillAlignment = SA; // Spill slot alignment in bits.
|
| /external/llvm-project/llvm/include/llvm/Target/ |
| D | Target.td | 63 int SpillAlignment = SA; // Spill slot alignment in bits.
|
| /external/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 355 int SpillAlignment = 0;
|
| /external/llvm-project/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 355 int SpillAlignment = 0;
|