| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringX86BaseImpl.h | 1765 Operand *Src0Lo, Operand *Src0Hi,
1797 _mov(T_2, Src0Hi);
1810 _mov(T_3, Src0Hi);
1812 _mov(T_2, Src0Hi);
1837 _mov(T_2, Src0Hi);
1848 _mov(T_2, Src0Hi);
1850 _mov(T_3, Src0Hi);
1860 _mov(T_3, Src0Hi);
1903 _mov(T_3, Src0Hi);
2026 Operand *Src0Hi = hiOperand(Src0);
[all …]
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| D | IceTargetLoweringMIPS32.cpp | 3061 Operand *Src0Hi = legalize(hiOperand(Src0), Legal_Reg); in lowerAssign() local
3067 _mov(T_Hi, Src0Hi); in lowerAssign()
5624 Variable *Src0Hi = legalizeToReg(hiOperand(Src)); in lowerSwitch() local
5632 _br(NoTarget, NoTarget, Src0Hi, ValueHi, IntraLabel, in lowerSwitch()
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| D | IceTargetLoweringARM32.cpp | 3539 Operand *Src0Hi = legalize(hiOperand(Src0), Legal_Reg | Legal_Flex); in lowerAssign() local
3540 _mov(T_Hi, Src0Hi); in lowerAssign()
6189 Variable *Src0Hi = legalizeToReg(hiOperand(Src0)); in lowerSwitch() local
6196 _cmp(Src0Hi, ValueHi, CondARM32::EQ); in lowerSwitch()
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| D | IceTargetLoweringX86Base.h | 1127 void lowerShift64(InstArithmetic::OpKind Op, Operand *Src0Lo, Operand *Src0Hi,
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 1115 SDValue Src0Lo, Src0Hi; in SplitVecRes_MLOAD() local
1117 GetSplitVector(Src0, Src0Lo, Src0Hi); in SplitVecRes_MLOAD()
1119 std::tie(Src0Lo, Src0Hi) = DAG.SplitVector(Src0, dl); in SplitVecRes_MLOAD()
1138 Hi = DAG.getMaskedLoad(HiVT, dl, Ch, Ptr, MaskHi, Src0Hi, HiMemVT, MMO, in SplitVecRes_MLOAD()
1178 SDValue Src0Lo, Src0Hi; in SplitVecRes_MGATHER() local
1180 GetSplitVector(Src0, Src0Lo, Src0Hi); in SplitVecRes_MGATHER()
1182 std::tie(Src0Lo, Src0Hi) = DAG.SplitVector(Src0, dl); in SplitVecRes_MGATHER()
1199 SDValue OpsHi[] = {Ch, Src0Hi, MaskHi, Ptr, IndexHi}; in SplitVecRes_MGATHER()
1693 SDValue Src0Lo, Src0Hi; in SplitVecOp_MGATHER() local
1695 GetSplitVector(Src0, Src0Lo, Src0Hi); in SplitVecOp_MGATHER()
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| D | DAGCombiner.cpp | 5489 SDValue Src0Lo, Src0Hi; in visitMGATHER() local
5490 std::tie(Src0Lo, Src0Hi) = DAG.SplitVector(Src0, DL); in visitMGATHER()
5516 SDValue OpsHi[] = {Chain, Src0Hi, MaskHi, BasePtr, IndexHi}; in visitMGATHER()
5564 SDValue Src0Lo, Src0Hi; in visitMLOAD() local
5565 std::tie(Src0Lo, Src0Hi) = DAG.SplitVector(Src0, DL); in visitMLOAD()
5601 Hi = DAG.getMaskedLoad(HiVT, DL, Chain, Ptr, MaskHi, Src0Hi, HiMemVT, MMO, in visitMLOAD()
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