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Searched refs:SysReg (Results 1 – 25 of 27) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVSystemOperands.td20 class SysReg<string name, bits<12> op> {
37 let FilterClass = "SysReg";
57 def : SysReg<"ustatus", 0x000>;
58 def : SysReg<"uie", 0x004>;
59 def : SysReg<"utvec", 0x005>;
64 def : SysReg<"uscratch", 0x040>;
65 def : SysReg<"uepc", 0x041>;
66 def : SysReg<"ucause", 0x042>;
67 def : SysReg<"utval", 0x043>;
68 def : SysReg<"uip", 0x044>;
[all …]
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVSystemOperands.td20 class SysReg<string name, bits<12> op> {
39 let FilterClass = "SysReg";
64 def : SysReg<"ustatus", 0x000>;
65 def : SysReg<"uie", 0x004>;
66 def : SysReg<"utvec", 0x005>;
71 def : SysReg<"uscratch", 0x040>;
72 def : SysReg<"uepc", 0x041>;
73 def : SysReg<"ucause", 0x042>;
74 def : SysReg<"utval", 0x043>;
75 def : SysReg<"uip", 0x044>;
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/MCTargetDesc/
DRISCVInstPrinter.cpp109 auto SysReg = RISCVSysReg::lookupSysRegByEncoding(Imm); in printCSRSystemRegister() local
110 if (SysReg && SysReg->haveRequiredFeatures(STI.getFeatureBits())) in printCSRSystemRegister()
111 O << SysReg->Name; in printCSRSystemRegister()
/external/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
DRISCVInstPrinter.cpp127 auto SysReg = RISCVSysReg::lookupSysRegByEncoding(Imm); in printCSRSystemRegister() local
128 if (SysReg && SysReg->haveRequiredFeatures(STI.getFeatureBits())) in printCSRSystemRegister()
129 O << SysReg->Name; in printCSRSystemRegister()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/AsmParser/
DRISCVAsmParser.cpp247 struct SysRegOp SysReg; member
269 SysReg = o.SysReg; in RISCVOperand()
627 return StringRef(SysReg.Data, SysReg.Length); in getSysReg()
691 Op->SysReg.Data = Str.data(); in createSysReg()
692 Op->SysReg.Length = Str.size(); in createSysReg()
693 Op->SysReg.Encoding = Encoding; in createSysReg()
743 Inst.addOperand(MCOperand::createImm(SysReg.Encoding)); in addCSRSystemRegisterOperands()
1097 auto SysReg = RISCVSysReg::lookupSysRegByEncoding(Imm); in parseCSRSystemRegister() local
1101 SysReg ? SysReg->Name : "", S, Imm, isRV64())); in parseCSRSystemRegister()
1115 auto SysReg = RISCVSysReg::lookupSysRegByName(Identifier); in parseCSRSystemRegister() local
[all …]
/external/llvm-project/llvm/lib/Target/RISCV/AsmParser/
DRISCVAsmParser.cpp290 struct SysRegOp SysReg; member
313 SysReg = o.SysReg; in RISCVOperand()
720 return StringRef(SysReg.Data, SysReg.Length); in getSysReg()
839 Op->SysReg.Data = Str.data(); in createSysReg()
840 Op->SysReg.Length = Str.size(); in createSysReg()
841 Op->SysReg.Encoding = Encoding; in createSysReg()
921 Inst.addOperand(MCOperand::createImm(SysReg.Encoding)); in addCSRSystemRegisterOperands()
1329 auto SysReg = RISCVSysReg::lookupSysRegByEncoding(Imm); in parseCSRSystemRegister() local
1333 SysReg ? SysReg->Name : "", S, Imm, isRV64())); in parseCSRSystemRegister()
1347 auto SysReg = RISCVSysReg::lookupSysRegByName(Identifier); in parseCSRSystemRegister() local
[all …]
/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp260 struct SysRegOp SysReg; member
307 SysReg = o.SysReg; in AArch64Operand()
396 return StringRef(SysReg.Data, SysReg.Length); in getSysReg()
891 return SysReg.MRSReg != -1U; in isMRSSystemRegister()
895 return SysReg.MSRReg != -1U; in isMSRSystemRegister()
899 return (SysReg.PStateField == AArch64PState::PAN || in isSystemPStateFieldWithImm0_1()
900 SysReg.PStateField == AArch64PState::UAO); in isSystemPStateFieldWithImm0_1()
904 return SysReg.PStateField != -1U; in isSystemPStateFieldWithImm0_15()
1515 Inst.addOperand(MCOperand::createImm(SysReg.MRSReg)); in addMRSSystemRegisterOperands()
1521 Inst.addOperand(MCOperand::createImm(SysReg.MSRReg)); in addMSRSystemRegisterOperands()
[all …]
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h431 struct SysReg { struct
446 const SysReg *lookupSysRegByName(StringRef); argument
447 const SysReg *lookupSysRegByEncoding(uint16_t);
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp600 auto SysReg = AArch64SysReg::TPIDR_EL0; in expandMI() local
604 SysReg = AArch64SysReg::TPIDR_EL1; in expandMI()
606 SysReg = AArch64SysReg::TPIDR_EL3; in expandMI()
608 SysReg = AArch64SysReg::TPIDR_EL2; in expandMI()
610 SysReg = AArch64SysReg::TPIDR_EL1; in expandMI()
612 .addImm(SysReg); in expandMI()
DAArch64SystemOperands.td511 class SysReg<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
530 : SysReg<name, op0, op1, crn, crm, op2> {
537 : SysReg<name, op0, op1, crn, crm, op2> {
544 : SysReg<name, op0, op1, crn, crm, op2> {
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp416 struct SysRegOp SysReg; member
464 SysReg = o.SysReg; in AArch64Operand()
566 return StringRef(SysReg.Data, SysReg.Length); in getSysReg()
1001 return SysReg.MRSReg != -1U; in isMRSSystemRegister()
1006 return SysReg.MSRReg != -1U; in isMSRSystemRegister()
1011 return (SysReg.PStateField == AArch64PState::PAN || in isSystemPStateFieldWithImm0_1()
1012 SysReg.PStateField == AArch64PState::DIT || in isSystemPStateFieldWithImm0_1()
1013 SysReg.PStateField == AArch64PState::UAO || in isSystemPStateFieldWithImm0_1()
1014 SysReg.PStateField == AArch64PState::SSBS); in isSystemPStateFieldWithImm0_1()
1019 return SysReg.PStateField != -1U; in isSystemPStateFieldWithImm0_15()
[all …]
/external/llvm-project/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp450 struct SysRegOp SysReg; member
498 SysReg = o.SysReg; in AArch64Operand()
600 return StringRef(SysReg.Data, SysReg.Length); in getSysReg()
1040 return SysReg.MRSReg != -1U; in isMRSSystemRegister()
1045 return SysReg.MSRReg != -1U; in isMSRSystemRegister()
1050 return (SysReg.PStateField == AArch64PState::PAN || in isSystemPStateFieldWithImm0_1()
1051 SysReg.PStateField == AArch64PState::DIT || in isSystemPStateFieldWithImm0_1()
1052 SysReg.PStateField == AArch64PState::UAO || in isSystemPStateFieldWithImm0_1()
1053 SysReg.PStateField == AArch64PState::SSBS); in isSystemPStateFieldWithImm0_1()
1058 return SysReg.PStateField != -1U; in isSystemPStateFieldWithImm0_15()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Utils/
DRISCVBaseInfo.h157 struct SysReg { struct
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h529 struct SysReg { struct
544 const SysReg *lookupSysRegByName(StringRef); argument
545 const SysReg *lookupSysRegByEncoding(uint16_t);
/external/llvm-project/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h529 struct SysReg { struct
544 const SysReg *lookupSysRegByName(StringRef); argument
545 const SysReg *lookupSysRegByEncoding(uint16_t);
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp891 auto SysReg = AArch64SysReg::TPIDR_EL0; in expandMI() local
894 SysReg = AArch64SysReg::TPIDR_EL3; in expandMI()
896 SysReg = AArch64SysReg::TPIDR_EL2; in expandMI()
898 SysReg = AArch64SysReg::TPIDR_EL1; in expandMI()
900 .addImm(SysReg); in expandMI()
DAArch64SystemOperands.td516 class SysReg<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
535 : SysReg<name, op0, op1, crn, crm, op2> {
542 : SysReg<name, op0, op1, crn, crm, op2> {
549 : SysReg<name, op0, op1, crn, crm, op2> {
/external/llvm-project/llvm/lib/Target/RISCV/Utils/
DRISCVBaseInfo.h210 struct SysReg { struct
/external/llvm/lib/Target/AArch64/InstPrinter/
DAArch64InstPrinter.cpp1430 const AArch64SysReg::SysReg *Reg = AArch64SysReg::lookupSysRegByEncoding(Val); in printMRSSystemRegister()
1450 const AArch64SysReg::SysReg *Reg = AArch64SysReg::lookupSysRegByEncoding(Val); in printMSRSystemRegister()
/external/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td269 class SysReg<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
288 : SysReg<name, op0, op1, crn, crm, op2> {
295 : SysReg<name, op0, op1, crn, crm, op2> {
302 : SysReg<name, op0, op1, crn, crm, op2> {
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrVFP.td2681 class vfp_vstrldr<bit opc, bit P, bit W, bits<4> SysReg, string sysreg,
2690 let Inst{22} = SysReg{3};
2694 let Inst{15-13} = SysReg{2-0};
2703 multiclass vfp_vstrldr_sysreg<bit opc, bits<4> SysReg, string sysreg,
2706 vfp_vstrldr<opc, 1, 0, SysReg, sysreg,
2713 vfp_vstrldr<opc, 1, 1, SysReg, sysreg,
2721 vfp_vstrldr<opc, 0, 1, SysReg, sysreg,
/external/llvm-project/llvm/lib/Target/ARM/
DARMInstrVFP.td2782 class vfp_vstrldr<bit opc, bit P, bit W, bits<4> SysReg, string sysreg,
2791 let Inst{22} = SysReg{3};
2795 let Inst{15-13} = SysReg{2-0};
2804 multiclass vfp_vstrldr_sysreg<bit opc, bits<4> SysReg, string sysreg,
2807 vfp_vstrldr<opc, 1, 0, SysReg, sysreg,
2814 vfp_vstrldr<opc, 1, 1, SysReg, sysreg,
2822 vfp_vstrldr<opc, 0, 1, SysReg, sysreg,
/external/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64InstPrinter.cpp1438 const AArch64SysReg::SysReg *Reg = AArch64SysReg::lookupSysRegByEncoding(Val); in printMRSSystemRegister()
1464 const AArch64SysReg::SysReg *Reg = AArch64SysReg::lookupSysRegByEncoding(Val); in printMSRSystemRegister()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64InstPrinter.cpp1414 const AArch64SysReg::SysReg *Reg = AArch64SysReg::lookupSysRegByEncoding(Val); in printMRSSystemRegister()
1434 const AArch64SysReg::SysReg *Reg = AArch64SysReg::lookupSysRegByEncoding(Val); in printMSRSystemRegister()
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenSystemOperands.inc2248 const SysReg *lookupSysRegByName(StringRef Name);
2249 const SysReg *lookupSysRegByEncoding(uint16_t Encoding);
2253 constexpr SysReg SysRegsList[] = {
3025 const SysReg *lookupSysRegByName(StringRef Name) {
3821 const SysReg *lookupSysRegByEncoding(uint16_t Encoding) {

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