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Searched refs:TC0 (Results 1 – 17 of 17) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dtest_func_desc.ll34 ; 32BIT-NEXT: .vbyte 4, TOC[TC0]
38 ; 64BIT-NEXT: .vbyte 8, TOC[TC0]
47 ; 32BIT-NEXT: .vbyte 4, TOC[TC0]
51 ; 64BIT-NEXT: .vbyte 8, TOC[TC0]
63 ; 32BIT-NEXT: .vbyte 4, TOC[TC0]
67 ; 64BIT-NEXT: .vbyte 8, TOC[TC0]
Daix-xcoff-funcsect.ll44 ; ASM-NEXT: .vbyte {{[0-9]+}}, TOC[TC0]
56 ; ASM-NEXT: .vbyte {{[0-9]+}}, TOC[TC0]
67 ; ASM-NEXT: .vbyte {{[0-9]+}}, TOC[TC0]
87 ; ASM-NEXT: .vbyte {{[0-9]+}}, TOC[TC0]
Daix-xcoff-symbol-rename.ll55 ; ASM-NEXT: .vbyte 4, TOC[TC0]
68 ; ASM-NEXT: .vbyte 4, TOC[TC0]
80 ; ASM-NEXT: .vbyte 4, TOC[TC0]
152 ; OBJ-NEXT: 00000070: R_POS (idx: 22) TOC[TC0]
159 ; OBJ-NEXT: 0000007c: R_POS (idx: 22) TOC[TC0]
166 ; OBJ-NEXT: 00000088: R_POS (idx: 22) TOC[TC0]
Daix-weak.ll50 ; BIT32-NEXT: .vbyte 4, TOC[TC0]
53 ; BIT64-NEXT: .vbyte 8, TOC[TC0]
63 ; BIT32-NEXT: .vbyte 4, TOC[TC0]
66 ; BIT64-NEXT: .vbyte 8, TOC[TC0]
76 ; BIT32-NEXT: .vbyte 4, TOC[TC0]
79 ; BIT64-NEXT: .vbyte 8, TOC[TC0]
Daix-exception.ll128 ; ASM32: .vbyte 4, L..C0-TOC[TC0] # TypeInfo 1
129 ; ASM64: .vbyte 8, L..C0-TOC[TC0] # TypeInfo 1
Daix-extern.ll46 ; BIT32-NEXT: .vbyte 4, TOC[TC0]
49 ; BIT64-NEXT: .vbyte 8, TOC[TC0]
59 ; BIT32-NEXT: .vbyte 4, TOC[TC0]
62 ; BIT64-NEXT: .vbyte 8, TOC[TC0]
Daix-extern-weak.ll38 ; BIT32-NEXT: .vbyte 4, TOC[TC0]
41 ; BIT64-NEXT: .vbyte 8, TOC[TC0]
/external/llvm-project/mlir/test/Dialect/Linalg/
Dtile-tensors.mlir10 // CHECK: %[[TD0:.*]] = scf.for {{.*}} to {{.*}} step {{.*}} iter_args(%[[TC0:.*]] = %[[TC]]) …
11 // CHECK: %[[TD1:.*]] = scf.for {{.*}} to {{.*}} step {{.*}} iter_args(%[[TC1:.*]] = %[[TC0]…
Dtile-and-distribute.mlir192 // CHECK: %[[TD0:.*]] = scf.for {{.*}} to {{.*}} step {{.*}} iter_args(%[[TC0:.*]] = %[[TC]]) …
195 // CHECK: %[[TD1:.*]] = scf.for {{.*}} to {{.*}} step {{.*}} iter_args(%[[TC1:.*]] = %[[TC0]…
/external/arm-trusted-firmware/docs/plat/arm/tc0/
Dindex.rst1 TC0 Total Compute Platform
4 Some of the features of TC0 platform referenced in TF-A include:
/external/llvm-project/llvm/lib/BinaryFormat/
DXCOFF.cpp30 SMC_CASE(TC0) in getMappingClassString()
/external/llvm-project/llvm/lib/MC/MCDisassembler/
DMCDisassembler.cpp63 SMC_PCASE(TC0, 0) in getSMCPriority()
/external/llvm-project/llvm/test/tools/llvm-objdump/XCOFF/
Dprint-reloc.test48 DESCP-NEXT:00000018 R_POS (idx: 18) TOC[TC0]
Ddisassemble-symbol-description.test66 RELOC: 00000098: R_POS (idx: 18) TOC[TC0]
/external/llvm-project/llvm/lib/Transforms/Scalar/
DLoopFuse.cpp730 const unsigned TC0 = SE.getSmallConstantTripCount(FC0.L); in haveIdenticalTripCounts() local
735 if (TC0 == 0 || TC1 == 0) { in haveIdenticalTripCounts()
743 int Diff = TC0 - TC1; in haveIdenticalTripCounts()
/external/walt/hardware/enclosure/
DWALT_recessed_enclosure.stl10 …R�@�]�@���@��@���@���@��\�,?|�<�������@���@��L@��@���@���@%��@��@��L@��TC0?d�9�����%��@��@��L…
36 …�KB�]�@���@P;KB���@���@��\�,?|�<�����P;KB���@��L@P;KB���@���@w�JB��@��L@��TC0?d�9�����w�JB��@��L…
65 …L@��KB6�B���@P;KB�B���@��\�,?|�<�����P;KB�B��L@P;KB�B���@w�JB�eB��L@��TC0?d�9�����w�JB�eB��L…
100 …L@uR�@6�B���@��@�B���@��\�,?|�<�������@�B��L@��@�B���@%��@�eB��L@��TC0?d�9�����%��@�eB��L…
/external/arm-trusted-firmware/docs/
Dchange-log.rst109 - Added support for Arm TC0