Home
last modified time | relevance | path

Searched refs:TCR_EL1 (Results 1 – 16 of 16) sorted by relevance

/external/linux-kselftest/tools/testing/selftests/kvm/include/aarch64/
Dprocessor.h17 #define TCR_EL1 3, 0, 2, 0, 2 macro
/external/linux-kselftest/tools/testing/selftests/kvm/lib/aarch64/
Dprocessor.c261 get_reg(vm, vcpuid, ARM64_SYS_REG(TCR_EL1), &tcr_el1); in aarch64_vcpu_setup()
300 set_reg(vm, vcpuid, ARM64_SYS_REG(TCR_EL1), tcr_el1); in aarch64_vcpu_setup()
/external/llvm-project/llvm/test/MC/AArch64/
Darm64-system-encoding.s115 msr TCR_EL1, x3
194 ; CHECK: msr TCR_EL1, x3 ; encoding: [0x43,0x20,0x18,0xd5]
304 mrs x3, TCR_EL1
490 ; CHECK: mrs x3, TCR_EL1 ; encoding: [0x43,0x20,0x38,0xd5]
Dbasic-a64-instructions.s3791 msr TCR_EL1, x12
4338 mrs x9, TCR_EL1
/external/llvm/test/MC/AArch64/
Darm64-system-encoding.s115 msr TCR_EL1, x3
195 ; CHECK: msr TCR_EL1, x3 ; encoding: [0x43,0x20,0x18,0xd5]
300 mrs x3, TCR_EL1
485 ; CHECK: mrs x3, TCR_EL1 ; encoding: [0x43,0x20,0x38,0xd5]
Dbasic-a64-instructions.s3804 msr TCR_EL1, x12
4352 mrs x9, TCR_EL1
/external/llvm-project/lldb/source/Plugins/Instruction/ARM64/
DEmulateInstructionARM64.cpp496 if target<55> == '1' && TCR_EL1.TBI1 == '1' then in BranchTo()
498 if target<55> == '0' && TCR_EL1.TBI0 == '1' then in BranchTo()
/external/OpenCSD/decoder/tests/snapshots/a55-test-tpiu/
Ddevice1.ini357 TCR_EL1(size:64)=0x0000000080000000
/external/OpenCSD/decoder/tests/snapshots/a57_single_step/
Ddevice1.ini357 TCR_EL1(size:64)=0x0000000080000000
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenSystemOperands.inc410 TCR_EL1 = 49410,
2474 { "TCR_EL1", 0xC102, true, true, {} }, // 220
3534 { "TCR_EL1", 220 },
/external/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td555 def : RWSysReg<"TCR_EL1", 0b11, 0b000, 0b0010, 0b0000, 0b010>;
/external/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt3277 # CHECK: msr {{tcr_el1|TCR_EL1}}, x12
3569 # CHECK: mrs x9, {{tcr_el1|TCR_EL1}}
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt3264 # CHECK: msr {{tcr_el1|TCR_EL1}}, x12
3558 # CHECK: mrs x9, {{tcr_el1|TCR_EL1}}
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td829 def : RWSysReg<"TCR_EL1", 0b11, 0b000, 0b0010, 0b0000, 0b010>;
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td834 def : RWSysReg<"TCR_EL1", 0b11, 0b000, 0b0010, 0b0000, 0b010>;
/external/OpenCSD/decoder/tests/snapshots-ete/002-ack_test_scr/
Dtest_TARMAC44 12 clk cpu0 IT (12) 10310028 d5182040 O EL3h_s : MSR TCR_EL1,x0
45 12 clk cpu0 R TCR_EL1 00000000:00000000
269 113 clk cpu1 IT (12) 10310028 d5182040 O EL3h_s : MSR TCR_EL1,x0
270 113 clk cpu1 R TCR_EL1 00000000:00000000
4934 2014 clk cpu0 IT (1978) 000a5a50:0000100a5a50 d5182040 O EL3h_s : MSR TCR_EL1,x0
4935 2014 clk cpu0 R TCR_EL1 00000000:00000000
8569 3444 clk cpu0 IT (3408) 000a5a50:0000100a5a50_NS d5182040 O EL2h_n : MSR TCR_EL1,x0
8570 3444 clk cpu0 R TCR_EL1 00000000:00000000
8975 3613 clk cpu0 IT (3577) 002400e4 d5182040 O EL1h_n : MSR TCR_EL1,x0
8976 3613 clk cpu0 R TCR_EL1 00000005:45908510
[all …]