Searched refs:TEGRA_CL_DVFS_BASE (Results 1 – 2 of 2) sorted by relevance
139 val = mmio_read_32(TEGRA_CL_DVFS_BASE + DVFS_DFLL_CTRL); in tegra_soc_get_target_pwr_state()230 mmio_write_32(TEGRA_CL_DVFS_BASE + DVFS_DFLL_CTRL, in tegra_soc_pwr_domain_suspend()234 cfg = mmio_read_32(TEGRA_CL_DVFS_BASE + DVFS_DFLL_OUTPUT_CFG); in tegra_soc_pwr_domain_suspend()513 cfg = mmio_read_32(TEGRA_CL_DVFS_BASE + DVFS_DFLL_OUTPUT_CFG); in tegra_soc_pwr_domain_on_finish()528 mmio_write_32(TEGRA_CL_DVFS_BASE + DVFS_DFLL_CTRL, in tegra_soc_pwr_domain_on_finish()
258 #define TEGRA_CL_DVFS_BASE U(0x70110000) macro