Searched refs:TGSI_OPCODE_DIV (Results 1 – 18 of 18) sorted by relevance
| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| D | tgsi_util.c | 187 case TGSI_OPCODE_DIV: in tgsi_util_get_inst_usage_mask()
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| D | tgsi_info.c | 110 { 1, 2, 0, 0, 0, 0, COMP, "DIV", TGSI_OPCODE_DIV },
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_aa_point.c | 182 tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_DIV, in aa_prolog()
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| D | tgsi_point_sprite.c | 321 tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_DIV, in psprite_emit_vertex_inst()
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| D | tgsi_exec.c | 5583 case TGSI_OPCODE_DIV: in exec_instruction()
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| /external/mesa3d/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 421 TGSI_OPCODE_DIV = 70, enumerator
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| /external/virglrenderer/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 404 #define TGSI_OPCODE_DIV 70 macro
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_tgsi_lower_depth_clamp.c | 145 inst.Instruction.Opcode = TGSI_OPCODE_DIV; in epilog_last_vertex_stage()
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| D | st_glsl_to_tgsi.cpp | 1587 emit_asm(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]); in visit_expression()
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_tgsi_action.c | 461 TGSI_OPCODE_DIV, abs_x, ex2_flr_log_abs_x); in log_emit()
628 TGSI_OPCODE_DIV, one, emit_data->args[0]); in rcp_emit()
1195 bld_base->op_actions[TGSI_OPCODE_DIV].emit = fdiv_emit; in lp_set_default_actions()
1637 TGSI_OPCODE_DIV, in log_emit_cpu()
2542 bld_base->op_actions[TGSI_OPCODE_DIV].emit = div_emit_cpu; in lp_set_default_actions_cpu()
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| D | lp_bld_tgsi_aos.c | 726 case TGSI_OPCODE_DIV: in lp_emit_instruction_aos()
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| /external/mesa3d/src/gallium/auxiliary/nir/ |
| D | nir_to_tgsi.c | 575 [nir_op_fdiv] = { TGSI_OPCODE_DIV, TGSI_OPCODE_DDIV }, in ntt_emit_alu()
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| D | tgsi_to_nir.c | 1847 [TGSI_OPCODE_DIV] = nir_op_fdiv,
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| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_tgsi_insn.c | 2808 case TGSI_OPCODE_DIV: in svga_emit_instruction()
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| D | svga_tgsi_vgpu10.c | 815 case TGSI_OPCODE_DIV: in translate_opcode()
9234 case TGSI_OPCODE_DIV: in emit_vgpu10_instruction()
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| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_from_tgsi.cpp | 3139 case TGSI_OPCODE_DIV: in handleInstruction()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_shader.c | 11743 [TGSI_OPCODE_DIV] = { ALU_OP0_NOP, tgsi_unsupported},
11941 [TGSI_OPCODE_DIV] = { ALU_OP0_NOP, tgsi_unsupported},
12167 [TGSI_OPCODE_DIV] = { ALU_OP0_NOP, tgsi_unsupported},
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| /external/virglrenderer/src/ |
| D | vrend_shader.c | 5010 case TGSI_OPCODE_DIV: in iter_instruction()
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