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Searched refs:TGSI_OPCODE_F2D (Results 1 – 16 of 16) sorted by relevance

/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_info.c212 case TGSI_OPCODE_F2D: in tgsi_opcode_infer_type()
294 case TGSI_OPCODE_F2D: in tgsi_opcode_infer_src_type()
Dtgsi_util.c207 case TGSI_OPCODE_F2D: in tgsi_util_get_inst_usage_mask()
Dtgsi_scan.c481 if ((fullinst->Instruction.Opcode >= TGSI_OPCODE_F2D && in scan_instruction()
Dtgsi_exec.c6045 case TGSI_OPCODE_F2D: in exec_instruction()
/external/virglrenderer/src/gallium/auxiliary/tgsi/
Dtgsi_info.c237 { 1, 1, 0, 0, 0, 0, COMP, "F2D", TGSI_OPCODE_F2D },
446 case TGSI_OPCODE_F2D: in tgsi_opcode_infer_type()
509 case TGSI_OPCODE_F2D: in tgsi_opcode_infer_src_type()
Dtgsi_scan.c166 if (fullinst->Instruction.Opcode >= TGSI_OPCODE_F2D && in tgsi_scan_shader()
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h559 TGSI_OPCODE_F2D = 195 /* SM5 */, enumerator
/external/virglrenderer/src/gallium/include/pipe/
Dp_shader_tokens.h541 #define TGSI_OPCODE_F2D 195 /* SM5 */ macro
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_from_tgsi.cpp386 case TGSI_OPCODE_F2D: { in srcMask()
668 case TGSI_OPCODE_F2D: in inferDstType()
3885 case TGSI_OPCODE_F2D: in handleInstruction()
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_vgpu10.c921 case TGSI_OPCODE_F2D: in translate_opcode()
8542 case TGSI_OPCODE_F2D: in opcode_has_dbl_dst()
8623 case TGSI_OPCODE_F2D: in check_double_dst_writemask()
9281 case TGSI_OPCODE_F2D: in emit_vgpu10_instruction()
/external/mesa3d/src/gallium/auxiliary/nir/
Dnir_to_tgsi.c585 [nir_op_f2f64] = { TGSI_OPCODE_F2D }, in ntt_emit_alu()
Dtgsi_to_nir.c1955 [TGSI_OPCODE_F2D] = nir_op_f2f64,
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_action.c1219 bld_base->op_actions[TGSI_OPCODE_F2D].emit = f2d_emit; in lp_set_default_actions()
/external/mesa3d/src/mesa/state_tracker/
Dst_glsl_to_tgsi.cpp658 if (op == TGSI_OPCODE_F2D || op == TGSI_OPCODE_U2D || in emit_asm()
2188 emit_asm(ir, TGSI_OPCODE_F2D, result_dst, op[0]); in visit_expression()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c12065 [TGSI_OPCODE_F2D] = { ALU_OP1_FLT32_TO_FLT64, tgsi_op2_64},
12291 [TGSI_OPCODE_F2D] = { ALU_OP1_FLT32_TO_FLT64, tgsi_op2_64},
/external/virglrenderer/src/
Dvrend_shader.c5098 case TGSI_OPCODE_F2D: in iter_instruction()