| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_shaderlib_tgsi.c | 185 ureg_memory_insn(ureg, TGSI_OPCODE_LOAD, &dst, 1, srcs, 2, load_qualifier, in si_create_dma_compute_shader()
244 ureg_memory_insn(ureg, TGSI_OPCODE_LOAD, &offsets, 1, map_load_args, 2, TGSI_MEMORY_RESTRICT, in si_create_dcc_retile_cs()
261 ureg_memory_insn(ureg, TGSI_OPCODE_LOAD, &dcc_value[i], 1, load_args, 2, TGSI_MEMORY_RESTRICT, in si_create_dcc_retile_cs()
752 ureg_memory_insn(ureg, TGSI_OPCODE_LOAD, &sample[i], 1, srcs, 2, TGSI_MEMORY_RESTRICT, target, in si_create_fmask_expand_cs()
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_glsl_to_tgsi_private.h | 174 case TGSI_OPCODE_LOAD: in is_resource_instruction()
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| D | st_glsl_to_tgsi.cpp | 593 if (i > 1 && (inst->op == TGSI_OPCODE_LOAD || in emit_asm()
621 if (dinst->op == TGSI_OPCODE_LOAD || in emit_asm()
2015 emit_asm(ir, TGSI_OPCODE_LOAD, result_dst, off); in visit_expression()
3483 inst = emit_asm(ir, TGSI_OPCODE_LOAD, dst, offset); in visit_atomic_counter_intrinsic()
3576 inst = emit_asm(ir, TGSI_OPCODE_LOAD, dst, off); in visit_ssbo_intrinsic()
3709 inst = emit_asm(ir, TGSI_OPCODE_LOAD, dst, off); in visit_shared_intrinsic()
3923 opcode = TGSI_OPCODE_LOAD; in visit_image_intrinsic()
6204 case TGSI_OPCODE_LOAD: in compile_tgsi_instruction()
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_info.c | 258 (opcode == TGSI_OPCODE_LOAD)) in tgsi_opcode_infer_src_type()
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| D | tgsi_util.c | 360 case TGSI_OPCODE_LOAD: in tgsi_util_get_inst_usage_mask()
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| D | tgsi_scan.c | 383 case TGSI_OPCODE_LOAD: in scan_instruction()
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| D | tgsi_text.c | 1092 if ((i >= TGSI_OPCODE_LOAD && i <= TGSI_OPCODE_ATOMIMAX) || in parse_instruction()
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| D | tgsi_exec.c | 6145 case TGSI_OPCODE_LOAD: in exec_instruction()
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| /external/mesa3d/src/gallium/auxiliary/nir/ |
| D | tgsi_to_nir.c | 1676 case TGSI_OPCODE_LOAD: in ttn_mem()
1696 case TGSI_OPCODE_LOAD: in ttn_mem()
1725 case TGSI_OPCODE_LOAD: in ttn_mem()
1762 if (tgsi_inst->Instruction.Opcode == TGSI_OPCODE_LOAD) { in ttn_mem()
1780 if (tgsi_inst->Instruction.Opcode == TGSI_OPCODE_LOAD) { in ttn_mem()
1927 [TGSI_OPCODE_LOAD] = 0,
2116 case TGSI_OPCODE_LOAD: in ttn_emit_instruction()
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| D | nir_to_tgsi.c | 1158 opcode = TGSI_OPCODE_LOAD; in ntt_emit_mem()
1253 op = TGSI_OPCODE_LOAD; in ntt_emit_image_load_store()
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| /external/mesa3d/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 515 TGSI_OPCODE_LOAD = 161, enumerator
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| /external/virglrenderer/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 498 #define TGSI_OPCODE_LOAD 161 macro
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| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| D | tgsi_info.c | 202 { 1, 2, 0, 0, 0, 0, OTHR, "LOAD", TGSI_OPCODE_LOAD },
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| D | tgsi_text.c | 1078 if ((i >= TGSI_OPCODE_LOAD && i <= TGSI_OPCODE_ATOMIMAX) || in parse_instruction()
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| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_from_tgsi.cpp | 1589 case TGSI_OPCODE_LOAD: in scanInstruction()
1590 info_out->io.globalAccess |= (insn.getOpcode() == TGSI_OPCODE_LOAD) ? in scanInstruction()
3720 case TGSI_OPCODE_LOAD: in handleInstruction()
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| /external/mesa3d/docs/gallium/ |
| D | screen.rst | 439 * ``PIPE_CAP_LOAD_CONSTBUF``: True if the driver supports ``TGSI_OPCODE_LOAD`` use
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_tgsi_soa.c | 4549 bld.bld_base.op_actions[TGSI_OPCODE_LOAD].emit = load_emit; in lp_build_tgsi_soa()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_shader.c | 11834 [TGSI_OPCODE_LOAD] = { ALU_OP0_NOP, tgsi_unsupported},
12031 [TGSI_OPCODE_LOAD] = { ALU_OP0_NOP, tgsi_load},
12257 [TGSI_OPCODE_LOAD] = { ALU_OP0_NOP, tgsi_load},
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| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_tgsi_vgpu10.c | 9462 case TGSI_OPCODE_LOAD: in emit_vgpu10_instruction()
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| /external/virglrenderer/src/ |
| D | vrend_shader.c | 5335 case TGSI_OPCODE_LOAD: in iter_instruction()
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