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Searched refs:TGSI_OPCODE_LRP (Results 1 – 22 of 22) sorted by relevance

/external/virglrenderer/src/gallium/auxiliary/tgsi/
Dtgsi_util.c195 case TGSI_OPCODE_LRP: in tgsi_util_get_inst_usage_mask()
Dtgsi_info.c58 { 1, 3, 0, 0, 0, 0, COMP, "LRP", TGSI_OPCODE_LRP },
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h369 TGSI_OPCODE_LRP = 18, enumerator
/external/virglrenderer/src/gallium/include/pipe/
Dp_shader_tokens.h355 #define TGSI_OPCODE_LRP 18 macro
/external/mesa3d/src/gallium/drivers/r300/
Dr300_tgsi_to_rc.c53 case TGSI_OPCODE_LRP: return RC_OPCODE_LRP; in translate_opcode()
/external/mesa3d/src/mesa/state_tracker/
Dst_atifs_to_tgsi.c73 {TGSI_OPCODE_LRP, "LERP", 3},
803 inst.Instruction.Opcode = TGSI_OPCODE_LRP; in transform_instr()
Dst_mesa_to_tgsi.c486 return TGSI_OPCODE_LRP; in translate_opcode()
Dst_glsl_to_tgsi.cpp2116 emit_asm(ir, TGSI_OPCODE_LRP, result_dst, op[2], op[1], op[0]); in visit_expression()
/external/mesa3d/src/gallium/drivers/i915/
Di915_fpc_optimize.c97 [ TGSI_OPCODE_LRP ] = { false, false, 0, 1, 3 },
Di915_fpc_translate.c700 case TGSI_OPCODE_LRP: in i915_translate_instruction()
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_aos.c548 case TGSI_OPCODE_LRP: in lp_emit_instruction_aos()
Dlp_bld_tgsi_action.c1191 bld_base->op_actions[TGSI_OPCODE_LRP].emit = lrp_emit; in lp_set_default_actions()
/external/mesa3d/src/gallium/auxiliary/nir/
Dtgsi_to_nir.c1809 [TGSI_OPCODE_LRP] = 0,
2064 case TGSI_OPCODE_LRP: in ttn_emit_instruction()
/external/mesa3d/src/gallium/drivers/nouveau/nv30/
Dnvfx_vertprog.c615 case TGSI_OPCODE_LRP: in nvfx_vertprog_parse_instruction()
Dnvfx_fragprog.c642 case TGSI_OPCODE_LRP: in nvfx_fragprog_parse_instruction()
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_lowering.c1345 case TGSI_OPCODE_LRP: in transform_instr()
Dtgsi_exec.c5313 case TGSI_OPCODE_LRP: in exec_instruction()
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_insn.c2915 case TGSI_OPCODE_LRP: in svga_emit_instruction()
Dsvga_tgsi_vgpu10.c9356 case TGSI_OPCODE_LRP: in emit_vgpu10_instruction()
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_from_tgsi.cpp3300 case TGSI_OPCODE_LRP: in handleInstruction()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c11691 [TGSI_OPCODE_LRP] = { ALU_OP0_NOP, tgsi_lrp},
11889 [TGSI_OPCODE_LRP] = { ALU_OP0_NOP, tgsi_lrp},
12115 [TGSI_OPCODE_LRP] = { ALU_OP0_NOP, tgsi_lrp},
/external/virglrenderer/src/
Dvrend_shader.c4859 case TGSI_OPCODE_LRP: in iter_instruction()