Home
last modified time | relevance | path

Searched refs:TGSI_OPCODE_MAD (Results 1 – 25 of 29) sorted by relevance

12

/external/virglrenderer/src/gallium/auxiliary/tgsi/
Dtgsi_util.c193 case TGSI_OPCODE_MAD: in tgsi_util_get_inst_usage_mask()
Dtgsi_info.c56 { 1, 3, 0, 0, 0, 0, COMP, "MAD", TGSI_OPCODE_MAD },
/external/mesa3d/src/mesa/state_tracker/
Dst_atifs_to_tgsi.c72 {TGSI_OPCODE_MAD, "MAD", 3},
108 ureg_insn(t->ureg, TGSI_OPCODE_MAD, &tmp[0], 1, imm, 3, 0); in apply_swizzle()
715 inst.Instruction.Opcode = TGSI_OPCODE_MAD; in transform_instr()
Dst_cb_drawpixels_shader.c150 tgsi_transform_op3_inst(tctx, TGSI_OPCODE_MAD, in transform_instr()
Dst_tgsi_lower_depth_clamp.c174 tgsi_transform_op3_swz_inst(tctx, TGSI_OPCODE_MAD, in epilog_last_vertex_stage()
Dst_mesa_to_tgsi.c488 return TGSI_OPCODE_MAD; in translate_opcode()
Dst_glsl_to_tgsi.cpp1290 emit_asm(ir, TGSI_OPCODE_MAD, result_dst, a, b, c); in try_emit_mad()
1331 emit_asm(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a); in try_emit_mad_for_and_not()
2152 emit_asm(ir, TGSI_OPCODE_MAD, result_dst, op[0], op[1], op[2]); in visit_expression()
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h367 TGSI_OPCODE_MAD = 16, enumerator
/external/virglrenderer/src/gallium/include/pipe/
Dp_shader_tokens.h353 #define TGSI_OPCODE_MAD 16 macro
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_lowering.c290 new_inst.Instruction.Opcode = TGSI_OPCODE_MAD; in transform_lrp()
302 new_inst.Instruction.Opcode = TGSI_OPCODE_MAD; in transform_lrp()
845 new_inst.Instruction.Opcode = TGSI_OPCODE_MAD; in transform_dotp()
859 new_inst.Instruction.Opcode = TGSI_OPCODE_MAD; in transform_dotp()
872 new_inst.Instruction.Opcode = TGSI_OPCODE_MAD; in transform_dotp()
Dtgsi_point_sprite.c355 inst.Instruction.Opcode = TGSI_OPCODE_MAD; in psprite_emit_vertex_inst()
/external/mesa3d/src/gallium/drivers/r300/
Dr300_tgsi_to_rc.c52 case TGSI_OPCODE_MAD: return RC_OPCODE_MAD; in translate_opcode()
/external/mesa3d/src/mesa/state_tracker/tests/
Dtest_glsl_to_tgsi_array_merge.cpp913 …{ TGSI_OPCODE_MAD, {MT(0, out1, WRITEMASK_W)}, {MT(5, 5, "x"), MT(3, 1, "x"), MT(1, 1, "x")}, {}, … in TEST_F()
931 …{ TGSI_OPCODE_MAD, {MT(0, out1, WRITEMASK_W)}, {MT(1, 5, "w"), MT(1, 1, "yyyy"), MT(1, 1, "xxxx")}… in TEST_F()
Dtest_glsl_to_tgsi_lifetime.cpp1549 { TGSI_OPCODE_MAD, {out0}, {1,2,3}, {}}, in TEST_F()
/external/mesa3d/src/gallium/drivers/i915/
Di915_fpc_optimize.c99 [ TGSI_OPCODE_MAD ] = { false, false, 0, 1, 3 },
Di915_fpc_translate.c722 case TGSI_OPCODE_MAD: in i915_translate_instruction()
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_aos.c539 case TGSI_OPCODE_MAD: in lp_emit_instruction_aos()
Dlp_bld_tgsi_action.c1192 bld_base->op_actions[TGSI_OPCODE_MAD].emit = mad_emit; in lp_set_default_actions()
2566 bld_base->op_actions[TGSI_OPCODE_MAD].emit = mad_emit_cpu; in lp_set_default_actions_cpu()
/external/mesa3d/src/gallium/drivers/nouveau/nv30/
Dnvfx_vertprog.c620 case TGSI_OPCODE_MAD: in nvfx_vertprog_parse_instruction()
Dnvfx_fragprog.c651 case TGSI_OPCODE_MAD: in nvfx_fragprog_parse_instruction()
/external/mesa3d/src/gallium/auxiliary/nir/
Dnir_to_tgsi.c662 [nir_op_ffma] = { TGSI_OPCODE_MAD, TGSI_OPCODE_DMAD }, in ntt_emit_alu()
Dtgsi_to_nir.c1807 [TGSI_OPCODE_MAD] = nir_op_ffma,
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_insn.c50 case TGSI_OPCODE_MAD: return SVGA3DOP_MAD; in translate_opcode()
Dsvga_tgsi_vgpu10.c795 case TGSI_OPCODE_MAD: in translate_opcode()
9257 case TGSI_OPCODE_MAD: in emit_vgpu10_instruction()
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_from_tgsi.cpp3169 case TGSI_OPCODE_MAD: in handleInstruction()

12