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Searched refs:TGSI_OPCODE_SEQ (Results 1 – 21 of 21) sorted by relevance

/external/virglrenderer/src/gallium/auxiliary/tgsi/
Dtgsi_util.c206 case TGSI_OPCODE_SEQ: in tgsi_util_get_inst_usage_mask()
Dtgsi_info.c85 { 1, 2, 0, 0, 0, 0, COMP, "SEQ", TGSI_OPCODE_SEQ },
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h396 TGSI_OPCODE_SEQ = 45, enumerator
/external/virglrenderer/src/gallium/include/pipe/
Dp_shader_tokens.h380 #define TGSI_OPCODE_SEQ 45 macro
/external/mesa3d/src/gallium/drivers/r300/
Dr300_tgsi_to_rc.c68 case TGSI_OPCODE_SEQ: return RC_OPCODE_SEQ; in translate_opcode()
/external/mesa3d/src/gallium/drivers/i915/
Di915_fpc_optimize.c108 [ TGSI_OPCODE_SEQ ] = { false, false, 0, 1, 2 },
Di915_fpc_translate.c790 case TGSI_OPCODE_SEQ: in i915_translate_instruction()
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_aos.c626 case TGSI_OPCODE_SEQ: in lp_emit_instruction_aos()
Dlp_bld_tgsi_action.c2575 bld_base->op_actions[TGSI_OPCODE_SEQ].emit = seq_emit_cpu; in lp_set_default_actions_cpu()
/external/mesa3d/src/gallium/drivers/nouveau/nv30/
Dnvfx_vertprog.c649 case TGSI_OPCODE_SEQ: in nvfx_vertprog_parse_instruction()
Dnvfx_fragprog.c692 case TGSI_OPCODE_SEQ: in nvfx_fragprog_parse_instruction()
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_insn.c2830 case TGSI_OPCODE_SEQ: in svga_emit_instruction()
3519 emit->info.opcode_count[TGSI_OPCODE_SEQ] >= 1 || in needs_to_create_common_immediate()
Dsvga_tgsi_vgpu10.c9366 case TGSI_OPCODE_SEQ: in emit_vgpu10_instruction()
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_from_tgsi.cpp710 case TGSI_OPCODE_SEQ: in getSetCond()
3357 case TGSI_OPCODE_SEQ: in handleInstruction()
/external/mesa3d/src/gallium/auxiliary/nir/
Dnir_to_tgsi.c599 [nir_op_seq] = { TGSI_OPCODE_SEQ }, in ntt_emit_alu()
Dtgsi_to_nir.c1826 [TGSI_OPCODE_SEQ] = nir_op_seq,
/external/mesa3d/src/mesa/state_tracker/
Dst_glsl_to_tgsi.cpp1603 emit_asm(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]); in visit_expression()
1625 emit_asm(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]); in visit_expression()
1670 emit_asm(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]); in visit_expression()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c11718 [TGSI_OPCODE_SEQ] = { ALU_OP2_SETE, tgsi_op2},
11916 [TGSI_OPCODE_SEQ] = { ALU_OP2_SETE, tgsi_op2},
12142 [TGSI_OPCODE_SEQ] = { ALU_OP2_SETE, tgsi_op2},
/external/mesa3d/src/gallium/frontends/nine/
Dnine_shader.c1966 case NINED3DSHADER_REL_OP_EQ: return TGSI_OPCODE_SEQ; in sm1_insn_flags_to_tgsi_setop()
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_exec.c5393 case TGSI_OPCODE_SEQ: in exec_instruction()
/external/virglrenderer/src/
Dvrend_shader.c5110 case TGSI_OPCODE_SEQ: in iter_instruction()