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Searched refs:TGSI_OPCODE_U64SHR (Results 1 – 8 of 8) sorted by relevance

/external/virglrenderer/src/gallium/auxiliary/tgsi/
Dtgsi_info.c294 { 1, 2, 0, 0, 0, 0, COMP, "U64SHR", TGSI_OPCODE_U64SHR },
459 case TGSI_OPCODE_U64SHR: in tgsi_opcode_infer_type()
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_info.c225 case TGSI_OPCODE_U64SHR: in tgsi_opcode_infer_type()
Dtgsi_exec.c6233 case TGSI_OPCODE_U64SHR: in exec_instruction()
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h612 TGSI_OPCODE_U64SHR = 243, enumerator
/external/virglrenderer/src/gallium/include/pipe/
Dp_shader_tokens.h599 #define TGSI_OPCODE_U64SHR 250 macro
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_from_tgsi.cpp612 case TGSI_OPCODE_U64SHR: in inferSrcType()
4024 case TGSI_OPCODE_U64SHR: in handleInstruction()
/external/mesa3d/src/gallium/auxiliary/nir/
Dnir_to_tgsi.c646 [nir_op_ushr] = { TGSI_OPCODE_USHR, TGSI_OPCODE_U64SHR }, in ntt_emit_alu()
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_action.c2637 bld_base->op_actions[TGSI_OPCODE_U64SHR].emit = u64shr_emit_cpu; in lp_set_default_actions_cpu()