Searched refs:TGSI_OPCODE_USHR (Results 1 – 14 of 14) sorted by relevance
| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| D | tgsi_info.c | 178 { 1, 2, 0, 0, 0, 0, COMP, "USHR", TGSI_OPCODE_USHR },
378 case TGSI_OPCODE_USHR: in tgsi_opcode_infer_type()
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| D | tgsi_util.c | 240 case TGSI_OPCODE_USHR: in tgsi_util_get_inst_usage_mask()
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_info.c | 145 case TGSI_OPCODE_USHR: in tgsi_opcode_infer_type()
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| D | tgsi_exec.c | 5902 case TGSI_OPCODE_USHR: in exec_instruction()
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| /external/mesa3d/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 488 TGSI_OPCODE_USHR = 138, enumerator
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| /external/virglrenderer/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 471 #define TGSI_OPCODE_USHR 138 macro
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| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_from_tgsi.cpp | 538 case TGSI_OPCODE_USHR: in inferSrcType()
3157 case TGSI_OPCODE_USHR: in handleInstruction()
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| /external/mesa3d/src/gallium/auxiliary/nir/ |
| D | nir_to_tgsi.c | 646 [nir_op_ushr] = { TGSI_OPCODE_USHR, TGSI_OPCODE_U64SHR }, in ntt_emit_alu()
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| D | tgsi_to_nir.c | 1911 [TGSI_OPCODE_USHR] = nir_op_ushr,
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_tgsi_action.c | 2597 bld_base->op_actions[TGSI_OPCODE_USHR].emit = ushr_emit_cpu; in lp_set_default_actions_cpu()
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| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_tgsi_vgpu10.c | 902 case TGSI_OPCODE_USHR: in translate_opcode()
9277 case TGSI_OPCODE_USHR: in emit_vgpu10_instruction()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_shader.c | 11811 [TGSI_OPCODE_USHR] = { ALU_OP2_LSHR_INT, tgsi_op2_trans},
12008 [TGSI_OPCODE_USHR] = { ALU_OP2_LSHR_INT, tgsi_op2},
12234 [TGSI_OPCODE_USHR] = { ALU_OP2_LSHR_INT, tgsi_op2},
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_glsl_to_tgsi.cpp | 2077 emit_asm(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), offset, in visit_expression()
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| /external/virglrenderer/src/ |
| D | vrend_shader.c | 5027 case TGSI_OPCODE_USHR: in iter_instruction()
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