Searched refs:TZC_REGION_ACCESS_RDWR (Results 1 – 8 of 8) sorted by relevance
207 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_CCI400) | \208 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_PCIE) | \209 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_HDLCD0) | \210 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_HDLCD1) | \211 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_USB) | \212 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_DMA330) | \213 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_THINLINKS) | \214 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_AP) | \215 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_GPU) | \216 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_CORESIGHT))
42 (TZC_REGION_ACCESS_RDWR(TZC_NSAID_ALL_AP)) | \43 (TZC_REGION_ACCESS_RDWR(TZC_NSAID_HDLCD0)) | \44 (TZC_REGION_ACCESS_RDWR(TZC_NSAID_PCI)) | \45 (TZC_REGION_ACCESS_RDWR(TZC_NSAID_AP)) | \46 (TZC_REGION_ACCESS_RDWR(TZC_NSAID_CLCD)) | \47 (TZC_REGION_ACCESS_RDWR(TZC_NSAID_VIRTIO))
104 TZC_REGION_ACCESS_RDWR(TZC_NSAID_ALL_AP) | \105 TZC_REGION_ACCESS_RDWR(TZC_NSAID_HDLCD0) | \106 TZC_REGION_ACCESS_RDWR(TZC_NSAID_HDLCD1) | \107 TZC_REGION_ACCESS_RDWR(TZC_NSAID_GPU) | \108 TZC_REGION_ACCESS_RDWR(TZC_NSAID_VIDEO) | \109 TZC_REGION_ACCESS_RDWR(TZC_NSAID_DISP0) | \110 TZC_REGION_ACCESS_RDWR(TZC_NSAID_DISP1))
251 TZC_REGION_ACCESS_RDWR(FVP_NSAID_DEFAULT) | \252 TZC_REGION_ACCESS_RDWR(FVP_NSAID_PCI) | \253 TZC_REGION_ACCESS_RDWR(FVP_NSAID_AP) | \254 TZC_REGION_ACCESS_RDWR(FVP_NSAID_VIRTIO) | \255 TZC_REGION_ACCESS_RDWR(FVP_NSAID_VIRTIO_OLD))
54 (TZC_REGION_ACCESS_RDWR(JUNO_TZC400_NSAID_FPGA_MEDIA_SECURE) | \58 (TZC_REGION_ACCESS_RDWR(JUNO_TZC400_NSAID_FPGA_VIDEO_PROTECTED))61 (TZC_REGION_ACCESS_RDWR(JUNO_TZC400_NSAID_FPGA_VIDEO_PRIVATE))
81 #define TZC_REGION_ACCESS_RDWR(nsaid) \ macro
250 (TZC_REGION_ACCESS_RDWR(TZC_NSAID_DEFAULT))