| /external/llvm-project/llvm/lib/Analysis/ |
| D | DependenceGraphBuilder.cpp | 417 NodeType *Tgt = &E->getTargetNode(); in simplify() local
418 auto TgtIT = TargetInDegreeMap.find(Tgt); in simplify()
443 NodeType &Tgt = Src.back().getTargetNode(); in simplify() local
444 assert(TargetInDegreeMap.find(&Tgt) != TargetInDegreeMap.end() && in simplify()
447 if (TargetInDegreeMap[&Tgt] != 1) in simplify()
450 if (!areNodesMergeable(Src, Tgt)) in simplify()
455 if (Tgt.hasEdgeTo(Src)) in simplify()
458 LLVM_DEBUG(dbgs() << "Merging:" << Src << "\nWith:" << Tgt << "\n"); in simplify()
460 mergeNodes(Src, Tgt); in simplify()
472 if (CandidateSourceNodes.erase(&Tgt)) { in simplify()
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| D | DDG.cpp | 270 const DDGNode &Tgt) const { in areNodesMergeable()
274 const auto *SimpleTgt = dyn_cast<const SimpleDDGNode>(&Tgt); in areNodesMergeable()
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| /external/llvm-project/llvm/include/llvm/Analysis/ |
| D | DDG.h | 373 DDGEdge &createDefUseEdge(DDGNode &Src, DDGNode &Tgt) final override { in createDefUseEdge() argument
374 auto *E = new DDGEdge(Tgt, DDGEdge::EdgeKind::RegisterDefUse); in createDefUseEdge()
376 Graph.connect(Src, Tgt, *E); in createDefUseEdge()
379 DDGEdge &createMemoryEdge(DDGNode &Src, DDGNode &Tgt) final override { in createMemoryEdge() argument
380 auto *E = new DDGEdge(Tgt, DDGEdge::EdgeKind::MemoryDependence); in createMemoryEdge()
382 Graph.connect(Src, Tgt, *E); in createMemoryEdge()
385 DDGEdge &createRootedEdge(DDGNode &Src, DDGNode &Tgt) final override { in createRootedEdge() argument
386 auto *E = new DDGEdge(Tgt, DDGEdge::EdgeKind::Rooted); in createRootedEdge()
389 Graph.connect(Src, Tgt, *E); in createRootedEdge()
402 const DDGNode &Tgt) const final override;
[all …]
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| D | DependenceGraphBuilder.h | 123 virtual EdgeType &createDefUseEdge(NodeType &Src, NodeType &Tgt) = 0;
126 virtual EdgeType &createMemoryEdge(NodeType &Src, NodeType &Tgt) = 0;
129 virtual EdgeType &createRootedEdge(NodeType &Src, NodeType &Tgt) = 0;
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Analysis/ |
| D | DDG.h | 365 DDGEdge &createDefUseEdge(DDGNode &Src, DDGNode &Tgt) final override { in createDefUseEdge() argument
366 auto *E = new DDGEdge(Tgt, DDGEdge::EdgeKind::RegisterDefUse); in createDefUseEdge()
368 Graph.connect(Src, Tgt, *E); in createDefUseEdge()
371 DDGEdge &createMemoryEdge(DDGNode &Src, DDGNode &Tgt) final override { in createMemoryEdge() argument
372 auto *E = new DDGEdge(Tgt, DDGEdge::EdgeKind::MemoryDependence); in createMemoryEdge()
374 Graph.connect(Src, Tgt, *E); in createMemoryEdge()
377 DDGEdge &createRootedEdge(DDGNode &Src, DDGNode &Tgt) final override { in createRootedEdge() argument
378 auto *E = new DDGEdge(Tgt, DDGEdge::EdgeKind::Rooted); in createRootedEdge()
381 Graph.connect(Src, Tgt, *E); in createRootedEdge()
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| D | DependenceGraphBuilder.h | 110 virtual EdgeType &createDefUseEdge(NodeType &Src, NodeType &Tgt) = 0;
113 virtual EdgeType &createMemoryEdge(NodeType &Src, NodeType &Tgt) = 0;
116 virtual EdgeType &createRootedEdge(NodeType &Src, NodeType &Tgt) = 0;
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| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | swaps-le-8.ll | 4 define dso_local void @test(i64* %Src, i64* nocapture %Tgt) local_unnamed_addr {
14 %2 = bitcast i64* %Tgt to <2 x double>*
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| /external/rust/crates/gdbstub/src/target/ |
| D | mod.rs | 168 pub type TargetResult<T, Tgt> = Result<T, TargetError<<Tgt as Target>::Error>>;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | AMDGPUInstPrinter.cpp | 919 uint32_t Tgt = MI->getOperand(OpNo).getImm() & ((1 << 6) - 1); in printExpTgt() local
921 if (Tgt <= 7) in printExpTgt()
922 O << " mrt" << Tgt; in printExpTgt()
923 else if (Tgt == 8) in printExpTgt()
925 else if (Tgt == 9) in printExpTgt()
927 else if ((Tgt >= 12 && Tgt <= 15) || (Tgt == 16 && AMDGPU::isGFX10(STI))) in printExpTgt()
928 O << " pos" << Tgt - 12; in printExpTgt()
929 else if (AMDGPU::isGFX10(STI) && Tgt == 20) in printExpTgt()
931 else if (Tgt >= 32 && Tgt <= 63) in printExpTgt()
932 O << " param" << Tgt - 32; in printExpTgt()
[all …]
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| /external/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | AMDGPUInstPrinter.cpp | 1017 uint32_t Tgt = MI->getOperand(OpNo).getImm() & ((1 << 6) - 1); in printExpTgt() local
1019 if (Tgt <= Exp::ET_MRT7) in printExpTgt()
1020 O << " mrt" << Tgt - Exp::ET_MRT0; in printExpTgt()
1021 else if (Tgt == Exp::ET_MRTZ) in printExpTgt()
1023 else if (Tgt == Exp::ET_NULL) in printExpTgt()
1025 else if (Tgt >= Exp::ET_POS0 && in printExpTgt()
1026 Tgt <= uint32_t(isGFX10Plus(STI) ? Exp::ET_POS4 : Exp::ET_POS3)) in printExpTgt()
1027 O << " pos" << Tgt - Exp::ET_POS0; in printExpTgt()
1028 else if (isGFX10Plus(STI) && Tgt == Exp::ET_PRIM) in printExpTgt()
1030 else if (Tgt >= Exp::ET_PARAM0 && Tgt <= Exp::ET_PARAM31) in printExpTgt()
[all …]
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsBranchExpansion.cpp | 271 MachineBasicBlock *Tgt = getTargetMBB(*FirstBr); in splitMBB() local
273 if (Tgt != getTargetMBB(*LastBr)) in splitMBB()
274 NewMBB->removeSuccessor(Tgt, true); in splitMBB()
276 MBB->addSuccessor(Tgt); in splitMBB()
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| D | MipsISelLowering.h | 400 SDValue Tgt = DAG.getNode(MipsISD::Wrapper, DL, Ty, getGlobalReg(DAG, Ty), in getAddrGlobal() local
402 return DAG.getLoad(Ty, DL, Chain, Tgt, PtrInfo); in getAddrGlobal()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsBranchExpansion.cpp | 271 MachineBasicBlock *Tgt = getTargetMBB(*FirstBr); in splitMBB() local
273 if (Tgt != getTargetMBB(*LastBr)) in splitMBB()
274 NewMBB->removeSuccessor(Tgt, true); in splitMBB()
276 MBB->addSuccessor(Tgt); in splitMBB()
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| D | MipsISelLowering.h | 414 SDValue Tgt = DAG.getNode(MipsISD::Wrapper, DL, Ty, getGlobalReg(DAG, Ty), in getAddrGlobal() local
416 return DAG.getLoad(Ty, DL, Chain, Tgt, PtrInfo); in getAddrGlobal()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsLongBranch.cpp | 153 MachineBasicBlock *Tgt = getTargetMBB(*FirstBr); in splitMBB() local
155 NewMBB->removeSuccessor(Tgt, true); in splitMBB()
157 MBB->addSuccessor(Tgt); in splitMBB()
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| D | MipsISelLowering.h | 330 SDValue Tgt = DAG.getNode(MipsISD::Wrapper, DL, Ty, getGlobalReg(DAG, Ty), in getAddrGlobal() local
332 return DAG.getLoad(Ty, DL, Chain, Tgt, PtrInfo, false, false, false, 0); in getAddrGlobal()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.cpp | 783 buildEXP(const TargetInstrInfo &TII, MachineInstr *Insert, unsigned Tgt, in buildEXP() argument
790 .addImm(Tgt) in buildEXP()
1115 int64_t Tgt = I.getOperand(1).getImm(); in selectG_INTRINSIC_W_SIDE_EFFECTS() local
1120 MachineInstr *Exp = buildEXP(TII, &I, Tgt, I.getOperand(3).getReg(), in selectG_INTRINSIC_W_SIDE_EFFECTS()
1131 int64_t Tgt = I.getOperand(1).getImm(); in selectG_INTRINSIC_W_SIDE_EFFECTS() local
1140 MachineInstr *Exp = buildEXP(TII, &I, Tgt, Reg0, Reg1, Undef, Undef, VM, in selectG_INTRINSIC_W_SIDE_EFFECTS()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 257 MachineInstrBuilder MachineIRBuilder::buildBrIndirect(Register Tgt) { in buildBrIndirect() argument
258 assert(getMRI()->getType(Tgt).isPointer() && "invalid branch destination"); in buildBrIndirect()
259 return buildInstr(TargetOpcode::G_BRINDIRECT).addUse(Tgt); in buildBrIndirect()
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| D | IRTranslator.cpp | 841 const Register Tgt = getOrCreateVReg(*BrInst.getAddress()); in translateIndirectBr() local
842 MIRBuilder.buildBrIndirect(Tgt); in translateIndirectBr()
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 222 MachineInstrBuilder MachineIRBuilder::buildBrIndirect(Register Tgt) { in buildBrIndirect() argument
223 assert(getMRI()->getType(Tgt).isPointer() && "invalid branch destination"); in buildBrIndirect()
224 return buildInstr(TargetOpcode::G_BRINDIRECT).addUse(Tgt); in buildBrIndirect()
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| D | IRTranslator.cpp | 1238 const Register Tgt = getOrCreateVReg(*BrInst.getAddress()); in translateIndirectBr() local
1239 MIRBuilder.buildBrIndirect(Tgt); in translateIndirectBr()
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| /external/eigen/Eigen/src/Core/ |
| D | GenericPacketMath.h | 122 template <typename Src, typename Tgt> struct type_casting_traits {
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 647 MachineInstrBuilder buildBrIndirect(Register Tgt);
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| /external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 744 MachineInstrBuilder buildBrIndirect(Register Tgt);
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| /external/clang/lib/Sema/ |
| D | SemaChecking.cpp | 7340 const llvm::fltSemantics &Tgt) { in IsSameFloatAfterCast() argument
7345 truncated.convert(Tgt, llvm::APFloat::rmNearestTiesToEven, &ignored); in IsSameFloatAfterCast()
7357 const llvm::fltSemantics &Tgt) { in IsSameFloatAfterCast() argument
7359 return IsSameFloatAfterCast(value.getFloat(), Src, Tgt); in IsSameFloatAfterCast()
7363 if (!IsSameFloatAfterCast(value.getVectorElt(i), Src, Tgt)) in IsSameFloatAfterCast()
7369 return (IsSameFloatAfterCast(value.getComplexFloatReal(), Src, Tgt) && in IsSameFloatAfterCast()
7370 IsSameFloatAfterCast(value.getComplexFloatImag(), Src, Tgt)); in IsSameFloatAfterCast()
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