Home
last modified time | relevance | path

Searched refs:Tmp3 (Results 1 – 25 of 35) sorted by relevance

12

/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DIntrinsicLowering.cpp74 Value *Tmp3 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
80 Tmp3 = Builder.CreateAnd(Tmp3, in LowerBSWAP()
86 Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or1"); in LowerBSWAP()
102 Value* Tmp3 = Builder.CreateLShr(V, in LowerBSWAP() local
127 Tmp3 = Builder.CreateAnd(Tmp3, in LowerBSWAP()
137 Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or3"); in LowerBSWAP()
/external/llvm-project/llvm/lib/CodeGen/
DIntrinsicLowering.cpp73 Value *Tmp3 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
79 Tmp3 = Builder.CreateAnd(Tmp3, in LowerBSWAP()
85 Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or1"); in LowerBSWAP()
101 Value* Tmp3 = Builder.CreateLShr(V, in LowerBSWAP() local
126 Tmp3 = Builder.CreateAnd(Tmp3, in LowerBSWAP()
136 Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or3"); in LowerBSWAP()
/external/llvm/lib/CodeGen/
DIntrinsicLowering.cpp186 Value *Tmp3 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
192 Tmp3 = Builder.CreateAnd(Tmp3, in LowerBSWAP()
198 Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or1"); in LowerBSWAP()
214 Value* Tmp3 = Builder.CreateLShr(V, in LowerBSWAP() local
239 Tmp3 = Builder.CreateAnd(Tmp3, in LowerBSWAP()
249 Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or3"); in LowerBSWAP()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp368 SDValue Tmp3 = Idx; in PerformInsertVectorEltInMemory() local
387 SDValue StackPtr2 = TLI.getVectorElementPointer(DAG, StackPtr, VT, Tmp3); in PerformInsertVectorEltInMemory()
1593 SDValue Tmp3 = Node->getOperand(2); in ExpandDYNAMIC_STACKALLOC() local
1603 unsigned Align = cast<ConstantSDNode>(Tmp3)->getZExtValue(); in ExpandDYNAMIC_STACKALLOC()
2605 SDValue Tmp, Tmp2, Tmp3; in ExpandBITREVERSE() local
2624 Tmp3 = DAG.getNode(ISD::AND, dl, VT, Tmp, DAG.getConstant(MaskLo4, dl, VT)); in ExpandBITREVERSE()
2626 Tmp3 = DAG.getNode(ISD::SHL, dl, VT, Tmp3, DAG.getConstant(4, dl, SHVT)); in ExpandBITREVERSE()
2627 Tmp = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in ExpandBITREVERSE()
2631 Tmp3 = DAG.getNode(ISD::AND, dl, VT, Tmp, DAG.getConstant(MaskLo2, dl, VT)); in ExpandBITREVERSE()
2633 Tmp3 = DAG.getNode(ISD::SHL, dl, VT, Tmp3, DAG.getConstant(2, dl, SHVT)); in ExpandBITREVERSE()
[all …]
DLegalizeFloatTypes.cpp1708 SDValue Tmp1, Tmp2, Tmp3; in FloatExpandSetCCOperands() local
1713 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
1719 NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3); in FloatExpandSetCCOperands()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp319 SDValue Tmp3 = Idx; in PerformInsertVectorEltInMemory() local
329 EVT IdxVT = Tmp3.getValueType(); in PerformInsertVectorEltInMemory()
342 Tmp3 = DAG.getZExtOrTrunc(Tmp3, dl, PtrVT); in PerformInsertVectorEltInMemory()
345 Tmp3 = DAG.getNode(ISD::MUL, dl, IdxVT, Tmp3, in PerformInsertVectorEltInMemory()
347 SDValue StackPtr2 = DAG.getNode(ISD::ADD, dl, IdxVT, Tmp3, StackPtr); in PerformInsertVectorEltInMemory()
1523 SDValue Tmp3 = Node->getOperand(2); in ExpandDYNAMIC_STACKALLOC() local
1533 unsigned Align = cast<ConstantSDNode>(Tmp3)->getZExtValue(); in ExpandDYNAMIC_STACKALLOC()
2583 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local
2592 Tmp3 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(8, dl, SHVT)); in ExpandBSWAP()
2595 Tmp3 = DAG.getNode(ISD::AND, dl, VT, Tmp3, in ExpandBSWAP()
[all …]
DLegalizeFloatTypes.cpp1549 SDValue Tmp1, Tmp2, Tmp3; in FloatExpandSetCCOperands() local
1554 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
1560 NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3); in FloatExpandSetCCOperands()
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp370 SDValue Tmp3 = Idx; in PerformInsertVectorEltInMemory() local
389 SDValue StackPtr2 = TLI.getVectorElementPointer(DAG, StackPtr, VT, Tmp3); in PerformInsertVectorEltInMemory()
1642 SDValue Tmp3 = Node->getOperand(2); in ExpandDYNAMIC_STACKALLOC() local
1652 Align Alignment = cast<ConstantSDNode>(Tmp3)->getAlignValue(); in ExpandDYNAMIC_STACKALLOC()
2722 SDValue Tmp, Tmp2, Tmp3; in ExpandBITREVERSE() local
2741 Tmp3 = DAG.getNode(ISD::AND, dl, VT, Tmp, DAG.getConstant(MaskLo4, dl, VT)); in ExpandBITREVERSE()
2743 Tmp3 = DAG.getNode(ISD::SHL, dl, VT, Tmp3, DAG.getConstant(4, dl, SHVT)); in ExpandBITREVERSE()
2744 Tmp = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in ExpandBITREVERSE()
2748 Tmp3 = DAG.getNode(ISD::AND, dl, VT, Tmp, DAG.getConstant(MaskLo2, dl, VT)); in ExpandBITREVERSE()
2750 Tmp3 = DAG.getNode(ISD::SHL, dl, VT, Tmp3, DAG.getConstant(2, dl, SHVT)); in ExpandBITREVERSE()
[all …]
DLegalizeFloatTypes.cpp1801 SDValue Tmp1, Tmp2, Tmp3, OutputChain; in FloatExpandSetCCOperands() local
1808 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
1817 NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3); in FloatExpandSetCCOperands()
/external/webrtc/modules/third_party/fft/
Dfft.h42 double Tmp3[FFT_MAXFFTSIZE]; member
Dfft.c342 Sin = (REAL *) fftstate->Tmp3; in FFTRADIX()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp3609 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchBEXTRFromAndImm() local
3610 if (tryFoldLoad(Node, N0.getNode(), Input, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in matchBEXTRFromAndImm()
3612 Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Control, Input.getOperand(0)}; in matchBEXTRFromAndImm()
3645 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPISTR() local
3646 if (MayFoldLoad && tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in emitPCMPISTR()
3647 SDValue Ops[] = { N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Imm, in emitPCMPISTR()
3678 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPESTR() local
3679 if (MayFoldLoad && tryFoldLoad(Node, N2, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in emitPCMPESTR()
3680 SDValue Ops[] = { N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Imm, in emitPCMPESTR()
4226 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Load; in tryVPTESTM() local
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp3708 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchBEXTRFromAndImm() local
3709 if (tryFoldLoad(Node, N0.getNode(), Input, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in matchBEXTRFromAndImm()
3711 Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Control, Input.getOperand(0)}; in matchBEXTRFromAndImm()
3744 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPISTR() local
3745 if (MayFoldLoad && tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in emitPCMPISTR()
3746 SDValue Ops[] = { N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Imm, in emitPCMPISTR()
3777 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPESTR() local
3778 if (MayFoldLoad && tryFoldLoad(Node, N2, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in emitPCMPESTR()
3779 SDValue Ops[] = { N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Imm, in emitPCMPESTR()
4030 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchVPTERNLOG() local
[all …]
/external/llvm-project/llvm/lib/Transforms/Utils/
DIntegerDivision.cpp134 Value *Tmp3 = Builder.CreateXor(Tmp1, Divisor); in generateSignedDivisionCode() local
135 Value *U_Dvsr = Builder.CreateSub(Tmp3, Tmp1); in generateSignedDivisionCode()
282 Value *Tmp3 = Builder.CreateLShr(Dividend, SR_1); in generateUnsignedDivisionCode() local
350 R_1->addIncoming(Tmp3, Preheader); in generateUnsignedDivisionCode()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/
DIntegerDivision.cpp134 Value *Tmp3 = Builder.CreateXor(Tmp1, Divisor); in generateSignedDivisionCode() local
135 Value *U_Dvsr = Builder.CreateSub(Tmp3, Tmp1); in generateSignedDivisionCode()
282 Value *Tmp3 = Builder.CreateLShr(Dividend, SR_1); in generateUnsignedDivisionCode() local
350 R_1->addIncoming(Tmp3, Preheader); in generateUnsignedDivisionCode()
/external/llvm/lib/Transforms/Utils/
DIntegerDivision.cpp135 Value *Tmp3 = Builder.CreateXor(Tmp1, Divisor); in generateSignedDivisionCode() local
136 Value *U_Dvsr = Builder.CreateSub(Tmp3, Tmp1); in generateSignedDivisionCode()
283 Value *Tmp3 = Builder.CreateLShr(Dividend, SR_1); in generateUnsignedDivisionCode() local
351 R_1->addIncoming(Tmp3, Preheader); in generateUnsignedDivisionCode()
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp2211 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
2212 bool foldedLoad = tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select()
2215 foldedLoad = tryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select()
2227 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N1.getOperand(0), in Select()
2364 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
2365 bool foldedLoad = tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select()
2372 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Move, Chain; in Select() local
2373 if (tryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in Select()
2374 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N0.getOperand(0) }; in Select()
2428 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N1.getOperand(0), in Select()
/external/clang/lib/CodeGen/
DCGExprComplex.cpp782 llvm::Value *Tmp3 = Builder.CreateAdd(Tmp1, Tmp2); // ac+bd in EmitBinDiv() local
793 DSTr = Builder.CreateUDiv(Tmp3, Tmp6); in EmitBinDiv()
796 DSTr = Builder.CreateSDiv(Tmp3, Tmp6); in EmitBinDiv()
/external/llvm-project/llvm/unittests/IR/
DPassManagerTest.cpp379 auto Tmp3 = PA1; in TEST() local
380 Intersected.intersect(std::move(Tmp3)); in TEST()
/external/llvm-project/clang/lib/CodeGen/
DCGExprComplex.cpp856 llvm::Value *Tmp3 = Builder.CreateAdd(Tmp1, Tmp2); // ac+bd in EmitBinDiv() local
867 DSTr = Builder.CreateUDiv(Tmp3, Tmp6); in EmitBinDiv()
870 DSTr = Builder.CreateSDiv(Tmp3, Tmp6); in EmitBinDiv()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp2417 SDValue Tmp3 = ST->getValue(); in LowerSTOREi1() local
2418 assert(Tmp3.getValueType() == MVT::i1 && "Custom lowering for i1 store only"); in LowerSTOREi1()
2419 Tmp3 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Tmp3); in LowerSTOREi1()
2421 DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(), MVT::i8, in LowerSTOREi1()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp2017 SDValue Tmp3 = ST->getValue(); in LowerSTOREi1() local
2018 assert(Tmp3.getValueType() == MVT::i1 && "Custom lowering for i1 store only"); in LowerSTOREi1()
2022 Tmp3 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Tmp3); in LowerSTOREi1()
2023 SDValue Result = DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, in LowerSTOREi1()
/external/llvm-project/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp2400 SDValue Tmp3 = ST->getValue(); in LowerSTOREi1() local
2401 assert(Tmp3.getValueType() == MVT::i1 && "Custom lowering for i1 store only"); in LowerSTOREi1()
2402 Tmp3 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Tmp3); in LowerSTOREi1()
2404 DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(), MVT::i8, in LowerSTOREi1()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp6942 SDValue Tmp3 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Tmp1); in LowerSHL_PARTS() local
6943 SDValue Tmp4 = DAG.getNode(ISD::OR , dl, VT, Tmp2, Tmp3); in LowerSHL_PARTS()
6971 SDValue Tmp3 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Tmp1); in LowerSRL_PARTS() local
6972 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in LowerSRL_PARTS()
6999 SDValue Tmp3 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Tmp1); in LowerSRA_PARTS() local
7000 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in LowerSRA_PARTS()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp1972 SDValue Tmp3 = in lowerVAARG() local
1977 Chain = DAG.getStore(VAListLoad.getValue(1), DL, Tmp3, VAListPtr, in lowerVAARG()

12