Searched refs:UDIVREM_I64 (Results 1 – 15 of 15) sorted by relevance
| /external/llvm/include/llvm/CodeGen/ |
| D | RuntimeLibcalls.h | 80 UDIVREM_I64, enumerator
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | RuntimeLibcalls.def | 81 HANDLE_LIBCALL(UDIVREM_I64, nullptr)
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| /external/llvm-project/llvm/include/llvm/IR/ |
| D | RuntimeLibcalls.def | 81 HANDLE_LIBCALL(UDIVREM_I64, nullptr)
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 226 setLibcallName(RTLIB::UDIVREM_I64, "__udivmoddi4"); in AVRTargetLowering()
361 LC = IsSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64; in LowerDivRem()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRuntimeLibcallSignatures.cpp | 149 Table[RTLIB::UDIVREM_I64] = i64_i64_func_i64_i64; in RuntimeLibcallSignatureTable()
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| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRuntimeLibcallSignatures.cpp | 150 Table[RTLIB::UDIVREM_I64] = i64_i64_func_i64_i64; in RuntimeLibcallSignatureTable()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 806 setLibcallName(RTLIB::UDIVREM_I64, "__aeabi_uldivmod"); in ARMTargetLowering()
815 setLibcallCallingConv(RTLIB::UDIVREM_I64, CallingConv::ARM_AAPCS); in ARMTargetLowering()
12020 case MVT::i64: LC = isSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64; break; in getDivRemLibcall()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2101 case MVT::i64: LC= isSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64; break; in ExpandDivRemLibCall()
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| D | DAGCombiner.cpp | 2145 case MVT::i64: LC= isSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64; break; in isDivRemLibcallAvailable()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2190 case MVT::i64: LC= isSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64; break; in ExpandDivRemLibCall()
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| D | DAGCombiner.cpp | 3611 case MVT::i64: LC= isSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64; break; in isDivRemLibcallAvailable()
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2247 case MVT::i64: LC= isSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64; break; in ExpandDivRemLibCall()
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| D | DAGCombiner.cpp | 3886 case MVT::i64: LC= isSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64; break; in isDivRemLibcallAvailable()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1157 { RTLIB::UDIVREM_I64, "__rt_udiv64", CallingConv::ARM_AAPCS }, in ARMTargetLowering()
1178 { RTLIB::UDIVREM_I64, "__aeabi_uldivmod", CallingConv::ARM_AAPCS }, in ARMTargetLowering()
16203 case MVT::i64: LC = isSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64; break; in getDivRemLibcall()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1210 { RTLIB::UDIVREM_I64, "__rt_udiv64", CallingConv::ARM_AAPCS }, in ARMTargetLowering()
1231 { RTLIB::UDIVREM_I64, "__aeabi_uldivmod", CallingConv::ARM_AAPCS }, in ARMTargetLowering()
17998 case MVT::i64: LC = isSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64; break; in getDivRemLibcall()
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