/external/vixl/src/aarch64/ |
D | operands-aarch64.cc | 184 VIXL_ASSERT(reg.Is64Bits() || ((extend != SXTX) && (extend != UXTX))); in Operand() 204 (((extend_ == UXTX) || (extend_ == SXTX)) && (shift_amount_ == 0))); in IsPlainRegister() 230 return Operand(reg_, reg_.Is64Bits() ? UXTX : UXTW, shift_amount_); in ToExtendedRegister()
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D | macro-assembler-aarch64.cc | 924 ((operand.GetExtend() != UXTX) && (operand.GetExtend() != SXTX))); in LogicalMacro() 1900 ((operand.GetExtend() != UXTX) && (operand.GetExtend() != SXTX))); in AddSubWithCarryMacro()
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D | disasm-aarch64.cc | 168 const char *form = ((mode == UXTX) || (mode == SXTX)) ? "'Rds, 'Rns, 'Xm'Ext" in VisitAddSubExtended() 171 ((mode == UXTX) || (mode == SXTX)) ? "'Rns, 'Xm'Ext" : "'Rns, 'Wm'Ext"; in VisitAddSubExtended() 10604 (instr->GetExtendMode() == UXTX))) { in SubstituteExtendField() 10643 if (!((ext == UXTX) && (shift == 0))) { in SubstituteLSRegOffsetField()
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64AddressingModes.h | 43 UXTX, enumerator 63 case AArch64_AM::UXTX: return "uxtx"; in getShiftExtendName() 130 case 3: return AArch64_AM::UXTX; in getExtendType() 157 case AArch64_AM::UXTX: return 3; break; in getExtendEncoding()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64AddressingModes.h | 43 UXTX, enumerator 63 case AArch64_AM::UXTX: return "uxtx"; in getShiftExtendName() 130 case 3: return AArch64_AM::UXTX; in getExtendType() 157 case AArch64_AM::UXTX: return 3; break; in getExtendEncoding()
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D | AArch64InstPrinter.cpp | 1000 if (ExtType == AArch64_AM::UXTW || ExtType == AArch64_AM::UXTX) { in printArithExtend() 1004 ExtType == AArch64_AM::UXTX) || in printArithExtend()
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/external/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64AddressingModes.h | 43 UXTX, enumerator 63 case AArch64_AM::UXTX: return "uxtx"; in getShiftExtendName() 130 case 3: return AArch64_AM::UXTX; in getExtendType() 157 case AArch64_AM::UXTX: return 3; break; in getExtendEncoding()
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D | AArch64InstPrinter.cpp | 1014 if (ExtType == AArch64_AM::UXTW || ExtType == AArch64_AM::UXTX) { in printArithExtend() 1018 ExtType == AArch64_AM::UXTX) || in printArithExtend()
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64SchedPredicates.td | 21 def CheckExtUXTX : CheckImmOperand_s<3, "AArch64_AM::UXTX">; 37 def CheckMemExtLSL : CheckImmOperand_s<3, "AArch64_AM::UXTX">;
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D | AArch64FrameLowering.cpp | 1267 .addImm(AArch64_AM::getArithExtendImm(AArch64_AM::UXTX, 4)) in emitPrologue()
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D | AArch64InstrInfo.cpp | 910 case AArch64_AM::UXTX: in isFalkorShiftExtFast() 944 case AArch64_AM::UXTX: in isFalkorShiftExtFast()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64SchedPredicates.td | 21 def CheckExtUXTX : CheckImmOperand_s<3, "AArch64_AM::UXTX">; 37 def CheckMemExtLSL : CheckImmOperand_s<3, "AArch64_AM::UXTX">;
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D | AArch64FrameLowering.cpp | 1120 .addImm(AArch64_AM::getArithExtendImm(AArch64_AM::UXTX, 4)) in emitPrologue()
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D | AArch64InstrInfo.cpp | 793 case AArch64_AM::UXTX: in isFalkorShiftExtFast() 827 case AArch64_AM::UXTX: in isFalkorShiftExtFast()
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/external/llvm/lib/Target/AArch64/Utils/ |
D | AArch64BaseInfo.h | 362 UXTX, enumerator
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/ |
D | AArch64BaseInfo.h | 460 UXTX, enumerator
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/external/llvm-project/llvm/lib/Target/AArch64/Utils/ |
D | AArch64BaseInfo.h | 460 UXTX, enumerator
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.cpp | 1104 if (ExtType == AArch64_AM::UXTW || ExtType == AArch64_AM::UXTX) { in printArithExtend() 1108 ExtType == AArch64_AM::UXTX) || in printArithExtend()
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/external/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 991 ET == AArch64_AM::UXTX || ET == AArch64_AM::SXTX || in isExtend() 1001 return ET != AArch64_AM::UXTX && ET != AArch64_AM::SXTX; in isExtend64() 1007 return (ET == AArch64_AM::UXTX || ET == AArch64_AM::SXTX || in isExtendLSL64() 1569 if (ET == AArch64_AM::LSL) ET = AArch64_AM::UXTX; in addExtend64Operands() 2392 .Case("uxtx", AArch64_AM::UXTX) in tryParseOptionalShiftExtend()
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/external/vixl/test/aarch64/ |
D | test-disasm-aarch64.cc | 331 COMPARE(add(x12, x13, Operand(x14, UXTX, 4)), "add x12, x13, x14, uxtx #4"); in TEST() 343 COMPARE(cmn(sp, Operand(xzr, UXTX, 3)), "cmn sp, xzr, lsl #3"); in TEST() 357 COMPARE(sub(x12, x13, Operand(x14, UXTX, 4)), "sub x12, x13, x14, uxtx #4"); in TEST() 369 COMPARE(cmp(sp, Operand(xzr, UXTX, 3)), "cmp sp, xzr, lsl #3"); in TEST()
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D | test-assembler-aarch64.cc | 500 __ Orr(x9, x0, Operand(x1, UXTX, 3)); in TEST() 594 __ Orn(x9, x0, Operand(x1, UXTX, 3)); in TEST() 661 __ And(x9, x0, Operand(x1, UXTX, 3)); in TEST() 807 __ Bic(x9, x0, Operand(x1, UXTX, 3)); in TEST() 939 __ Eor(x9, x0, Operand(x1, UXTX, 3)); in TEST() 1006 __ Eon(x9, x0, Operand(x1, UXTX, 3)); in TEST() 5303 __ Adc(x13, x1, Operand(x2, UXTX, 4)); in TEST() 5315 __ Adc(x23, x1, Operand(x2, UXTX, 4)); in TEST() 7405 __ adds(xzr, x0, Operand(x1, UXTX)); in TEST() 7406 __ adds(xzr, x1, Operand(xzr, UXTX)); in TEST() [all …]
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D | test-api-aarch64.cc | 988 VIXL_CHECK(Operand(x5, UXTX).IsPlainRegister()); in TEST() 1000 VIXL_CHECK(!Operand(x5, UXTX, 1).IsPlainRegister()); in TEST()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 1254 ET == AArch64_AM::UXTX || ET == AArch64_AM::SXTX || in isExtend() 1273 return (ET == AArch64_AM::UXTX || ET == AArch64_AM::SXTX || in isExtendLSL64() 1745 if (ET == AArch64_AM::LSL) ET = AArch64_AM::UXTX; in addExtend64Operands() 2753 .Case("uxtx", AArch64_AM::UXTX) in tryParseOptionalShiftExtend()
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/external/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 1295 ET == AArch64_AM::UXTX || ET == AArch64_AM::SXTX || in isExtend() 1314 return (ET == AArch64_AM::UXTX || ET == AArch64_AM::SXTX || in isExtendLSL64() 1786 if (ET == AArch64_AM::LSL) ET = AArch64_AM::UXTX; in addExtend64Operands() 2804 .Case("uxtx", AArch64_AM::UXTX) in tryParseOptionalShiftExtend()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 1781 // UXTX and SXTX only. 1808 GPR64sponly, GPR64sp, GPR64, 24>; // UXTX #0 1811 GPR64sp, GPR64sponly, GPR64, 24>; // UXTX #0 1855 // UXTX and SXTX only. 1913 GPR64, GPR64sponly, GPR64, 24>; // UXTX #0
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