/external/llvm/test/CodeGen/SPARC/ |
D | 2011-01-11-CC.ll | 2 ; RUN: llc -march=sparc -mattr=v9 <%s | FileCheck %s -check-prefix=V9 11 ; V9: addcc 12 ; V9-NOT: subcc 13 ; V9: addx 14 ; V9: mov{{e|ne}} %icc 27 ; V9: test_select_int_icc 28 ; V9: cmp 29 ; V9-NOT: {{be|bne}} 30 ; V9: mov{{e|ne}} %icc 42 ; V9: test_select_fp_icc [all …]
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D | 2011-01-11-Call.ll | 3 ; RUN: llc -march=sparcv9 <%s | FileCheck %s --check-prefix=V9 14 ; V9-LABEL: test 15 ; V9: save %sp 16 ; V9: call foo 17 ; V9-NEXT: nop 18 ; V9: call bar 19 ; V9-NEXT: nop 20 ; V9: ret 21 ; V9-NEXT: restore 42 ; V9-LABEL: test_tail_call_with_return [all …]
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D | 2011-01-11-FrameAddr.ll | 2 ;RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9 4 ;RUN: llc -march=sparc -regalloc=basic -mattr=v9 < %s | FileCheck %s -check-prefix=V9 15 ;V9-LABEL: frameaddr: 16 ;V9: save %sp, -96, %sp 17 ;V9: ret 18 ;V9: restore %g0, %fp, %o0 39 ;V9-LABEL: frameaddr2: 40 ;V9: flushw 41 ;V9: ld [%fp+56], {{.+}} 42 ;V9: ld [{{.+}}+56], {{.+}} [all …]
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D | float.ll | 4 ; RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9 18 ; V9-LABEL: test_neg: 19 ; V9: fnegd %f0, %f0 41 ; V9-LABEL: test_abs: 42 ; V9: fabsd %f0, %f0 64 ; V9-LABEL: test_v9_floatreg: 65 ; V9: fsubd {{.+}}, {{.+}}, {{.+}} 66 ; V9: faddd {{.+}}, {{.+}}, %f0 86 ; V9-LABEL: test_xtos_stox 87 ; V9: call __floatdisf [all …]
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D | ctpop.ll | 2 ; RUN: llc < %s -march=sparc -mattr=+v9,+popc | FileCheck %s -check-prefix=V9 7 ; RUN: llc < %s -march=sparc -mcpu=niagara2 | FileCheck %s -check-prefix=V9 8 ; RUN: llc < %s -march=sparc -mcpu=niagara3 | FileCheck %s -check-prefix=V9 9 ; RUN: llc < %s -march=sparc -mcpu=niagara4 | FileCheck %s -check-prefix=V9 17 ; V9-LABEL: test 18 ; V9: srl %o0, 0, %o0 19 ; V9-NEXT: retl 20 ; V9-NEXT: popc %o0, %o0
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D | setjmp.ll | 2 ;RUN: llc -march=sparcv9 < %s | FileCheck %s --check-prefix=V9 19 ; V9-LABEL: foo 20 ; V9-DAG: st {{.+}}, [%i0] 21 ; V9-DAG: st {{.+}}, [%i0+4] 22 ; V9: call _setjmp 23 ; V9: ldx [%fp+{{.+}}], %[[R:[gilo][0-7]]] 24 ; V9: st %o0, [%[[R]]+{{.+}}]
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/external/llvm-project/llvm/test/CodeGen/SPARC/ |
D | 2011-01-11-CC.ll | 2 ; RUN: llc -march=sparc -mattr=v9 <%s | FileCheck %s -check-prefix=V9 11 ; V9: addcc 12 ; V9-NOT: subcc 13 ; V9: addx 14 ; V9: mov{{e|ne}} %icc 27 ; V9: test_select_int_icc 28 ; V9: cmp 29 ; V9-NOT: {{be|bne}} 30 ; V9: mov{{e|ne}} %icc 42 ; V9: test_select_fp_icc [all …]
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D | fp16-promote.ll | 5 ; RUN: llc -mtriple=sparc-linux-gnu -mattr=v9 < %s | FileCheck %s -check-prefixes=ALL,V9 28 ; V9-LABEL: test_fpextend_float: 29 ; V9: ! %bb.0: 30 ; V9-NEXT: save %sp, -96, %sp 31 ; V9-NEXT: call __gnu_h2f_ieee 32 ; V9-NEXT: lduh [%i0], %o0 33 ; V9-NEXT: ret 34 ; V9-NEXT: restore 58 ; V9-LABEL: test_fpextend_double: 59 ; V9: ! %bb.0: [all …]
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D | 2011-01-11-Call.ll | 3 ; RUN: llc -march=sparcv9 <%s | FileCheck %s --check-prefix=V9 14 ; V9-LABEL: test 15 ; V9: save %sp 16 ; V9: call foo 17 ; V9-NEXT: nop 18 ; V9: call bar 19 ; V9-NEXT: nop 20 ; V9: ret 21 ; V9-NEXT: restore 42 ; V9-LABEL: test_tail_call_with_return [all …]
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D | 2011-01-11-FrameAddr.ll | 2 ;RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9 4 ;RUN: llc -march=sparc -regalloc=basic -mattr=v9 < %s | FileCheck %s -check-prefix=V9 15 ;V9-LABEL: frameaddr: 16 ;V9: save %sp, -96, %sp 17 ;V9: ret 18 ;V9: restore %g0, %fp, %o0 39 ;V9-LABEL: frameaddr2: 40 ;V9: flushw 41 ;V9: ld [%fp+56], {{.+}} 42 ;V9: ld [{{.+}}+56], {{.+}} [all …]
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D | float.ll | 4 ; RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9 18 ; V9-LABEL: test_neg: 19 ; V9: fnegd %f0, %f0 41 ; V9-LABEL: test_abs: 42 ; V9: fabsd %f0, %f0 64 ; V9-LABEL: test_v9_floatreg: 65 ; V9: fsubd {{.+}}, {{.+}}, {{.+}} 66 ; V9: faddd {{.+}}, {{.+}}, %f0 86 ; V9-LABEL: test_xtos_stox 87 ; V9: call __floatdisf [all …]
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D | ctpop.ll | 2 ; RUN: llc < %s -march=sparc -mattr=+v9,+popc | FileCheck %s -check-prefix=V9 7 ; RUN: llc < %s -march=sparc -mcpu=niagara2 | FileCheck %s -check-prefix=V9 8 ; RUN: llc < %s -march=sparc -mcpu=niagara3 | FileCheck %s -check-prefix=V9 9 ; RUN: llc < %s -march=sparc -mcpu=niagara4 | FileCheck %s -check-prefix=V9 17 ; V9-LABEL: test 18 ; V9: srl %o0, 0, %o0 19 ; V9-NEXT: retl 20 ; V9-NEXT: popc %o0, %o0
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D | setjmp.ll | 2 ;RUN: llc -march=sparcv9 < %s | FileCheck %s --check-prefix=V9 19 ; V9-LABEL: foo 20 ; V9-DAG: st {{.+}}, [%i0] 21 ; V9-DAG: st {{.+}}, [%i0+4] 22 ; V9: call _setjmp 23 ; V9: ldx [%fp+{{.+}}], %[[R:[gilo][0-7]]] 24 ; V9: st %o0, [%[[R]]+{{.+}}]
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D | 2009-08-28-PIC.ll | 2 ; RUN: llc -march=sparcv9 --relocation-model=pic < %s | FileCheck %s --check-prefix=V9 10 ; V9-LABEL: func 11 ; V9: _GLOBAL_OFFSET_TABLE_
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/external/llvm-project/lld/test/ELF/ |
D | emulation-sparc.s | 4 # RUN: llvm-readobj --file-headers %t1 | FileCheck --check-prefix=V9 %s 9 # RUN: llvm-readobj --file-headers %t3 | FileCheck --check-prefix=V9 %s 11 # V9: ElfHeader { 12 # V9-NEXT: Ident { 13 # V9-NEXT: Magic: (7F 45 4C 46) 14 # V9-NEXT: Class: 64-bit (0x2) 15 # V9-NEXT: DataEncoding: BigEndian (0x2) 16 # V9-NEXT: FileVersion: 1 17 # V9-NEXT: OS/ABI: SystemV (0x0) 18 # V9-NEXT: ABIVersion: 0 [all …]
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/external/llvm-project/llvm/test/MC/Sparc/ |
D | sparcv9-instructions.s | 2 ! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9 6 ! V9: addx %g2, %g1, %g3 ! encoding: [0x86,0x40,0x80,0x01] 11 ! V9: addxcc %g1, %g2, %g3 ! encoding: [0x86,0xc0,0x40,0x02] 16 ! V9: subx %g2, %g1, %g3 ! encoding: [0x86,0x60,0x80,0x01] 21 ! V9: subxcc %g1, %g2, %g3 ! encoding: [0x86,0xe0,0x40,0x02] 26 ! V9: popc %g1, %g2 ! encoding: [0x85,0x70,0x00,0x01] 32 ! V9: sra %g1, %g0, %g2 ! encoding: [0x85,0x38,0x40,0x00] 36 ! V9: sra %g1, %g0, %g1 ! encoding: [0x83,0x38,0x40,0x00] 41 ! V9: ld [%i0+%l6], %o2 ! encoding: [0xd4,0x06,0x00,0x16] 45 ! V9: ld [%i0+32], %o2 ! encoding: [0xd4,0x06,0x20,0x20] [all …]
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D | sparc-synthetic-instructions.s | 168 ! depending on whether targeting V8 or V9. 171 ! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9 174 ! V9: sethi %hi(-1), %o1 ! encoding: [0x13,0b00AAAAAA,A,A] 175 …! V9: ! fixup A - offset: 0, value: %hi(-1), kind: fixup_sparc_h… 176 ! V9: or %o1, %lo(-1), %o1 ! encoding: [0x92,0x12,0b011000AA,A] 177 …! V9: ! fixup A - offset: 0, value: %lo(-1), kind: fixup_sparc_l… 181 ! V9: sethi %hi(-2), %o1 ! encoding: [0x13,0b00AAAAAA,A,A] 182 …! V9: ! fixup A - offset: 0, value: %hi(-2), kind: fixup_sparc_h… 183 ! V9: or %o1, %lo(-2), %o1 ! encoding: [0x92,0x12,0b011000AA,A] 184 …! V9: ! fixup A - offset: 0, value: %lo(-2), kind: fixup_sparc_l… [all …]
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D | sparc-asm-errors.s | 2 … llvm-mc %s -arch=sparcv9 -show-encoding 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=V9 11 ! V9: unknown membar tag 15 ! V9: invalid membar mask number
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/external/llvm/test/MC/Sparc/ |
D | sparcv9-instructions.s | 2 ! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9 6 ! V9: addx %g2, %g1, %g3 ! encoding: [0x86,0x40,0x80,0x01] 11 ! V9: addxcc %g1, %g2, %g3 ! encoding: [0x86,0xc0,0x40,0x02] 16 ! V9: subx %g2, %g1, %g3 ! encoding: [0x86,0x60,0x80,0x01] 21 ! V9: subxcc %g1, %g2, %g3 ! encoding: [0x86,0xe0,0x40,0x02] 26 ! V9: popc %g1, %g2 ! encoding: [0x85,0x70,0x00,0x01] 32 ! V9: sra %g1, %g0, %g2 ! encoding: [0x85,0x38,0x40,0x00] 36 ! V9: sra %g1, %g0, %g1 ! encoding: [0x83,0x38,0x40,0x00] 41 ! V9: ld [%i0+%l6], %o2 ! encoding: [0xd4,0x06,0x00,0x16] 45 ! V9: ld [%i0+32], %o2 ! encoding: [0xd4,0x06,0x20,0x20] [all …]
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D | sparc-synthetic-instructions.s | 168 ! depending on whether targeting V8 or V9. 171 ! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9 174 ! V9: sethi %hi(-1), %o1 ! encoding: [0x13,0b00AAAAAA,A,A] 175 …! V9: ! fixup A - offset: 0, value: %hi(-1), kind: fixup_sparc_h… 176 ! V9: or %o1, %lo(-1), %o1 ! encoding: [0x92,0x12,0b011000AA,A] 177 …! V9: ! fixup A - offset: 0, value: %lo(-1), kind: fixup_sparc_l… 181 ! V9: sethi %hi(-2), %o1 ! encoding: [0x13,0b00AAAAAA,A,A] 182 …! V9: ! fixup A - offset: 0, value: %hi(-2), kind: fixup_sparc_h… 183 ! V9: or %o1, %lo(-2), %o1 ! encoding: [0x92,0x12,0b011000AA,A] 184 …! V9: ! fixup A - offset: 0, value: %lo(-2), kind: fixup_sparc_l… [all …]
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/external/libxaac/decoder/armv8/ |
D | ixheaacd_overlap_add1.s | 134 SQSUB V9.4S, V12.4S, V8.4S 139 SQSHL V9.4S, V9.4S, #2 141 SSHR V9.4S, V9.4S, #16 144 UZP1 V18.8H, V9.8H, V9.8H 203 SQSUB V9.4S, V12.4S, V8.4S 205 SQSHL V9.4S, V9.4S, #2 209 SSHR V9.4S, V9.4S, #16 212 UZP1 V18.8H, V9.8H, V9.8H 258 SQSUB V9.4S, V12.4S, V8.4S 264 SQSHL V9.4S, V9.4S, #2 [all …]
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D | ixheaacd_sbr_imdct_using_fft.s | 147 SUB V9.4S, V0.4S, V4.4S 183 ADD V3.4S, V9.4S, V6.4S 186 SUB V7.4S, V9.4S, V6.4S 192 ADD V9.4S, V4.4S, V5.4S 308 ADD V1.4S, V9.4S, V14.4S 309 SUB V18.4S, V9.4S, V14.4S 344 TRN1 V9.4S, V17.4S, V3.4S 348 SHL V9.4S, V9.4S, #1 379 swp V9.D[0], V12.D[1] 396 ST2 {V9.4S, V10.4S}, [X3], X15 [all …]
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/external/llvm-project/llvm/lib/Target/Sparc/ |
D | README.txt | 8 * When in V9 mode, register allocate %icc[0-3]. 38 1) should be replaced with a brz in V9 mode. 40 * Same as above, but emit conditional move on register zero (p192) in V9 49 * Emit MULX/[SU]DIVX instructions in V9 mode instead of fiddling
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/external/llvm/lib/Target/Sparc/ |
D | README.txt | 8 * When in V9 mode, register allocate %icc[0-3]. 38 1) should be replaced with a brz in V9 mode. 40 * Same as above, but emit conditional move on register zero (p192) in V9 49 * Emit MULX/[SU]DIVX instructions in V9 mode instead of fiddling
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
D | README.txt | 8 * When in V9 mode, register allocate %icc[0-3]. 38 1) should be replaced with a brz in V9 mode. 40 * Same as above, but emit conditional move on register zero (p192) in V9 49 * Emit MULX/[SU]DIVX instructions in V9 mode instead of fiddling
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