/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 590 VAARG_64 enumerator
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D | X86InstrCompiler.td | 91 // The VAARG_64 pseudo-instruction takes the address of the va_list, 94 def VAARG_64 : I<0, Pseudo, 97 "#VAARG_64 $dst, $ap, $size, $mode, $align",
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D | X86InstrInfo.td | 181 SDNode<"X86ISD::VAARG_64", SDT_X86VAARG_64,
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D | X86ISelLowering.cpp | 16994 SDValue VAARG = DAG.getMemIntrinsicNode(X86ISD::VAARG_64, dl, in LowerVAARG() 22267 case X86ISD::VAARG_64: return "X86ISD::VAARG_64"; in getTargetNodeName() 24529 case X86::VAARG_64: in EmitInstrWithCustomInserter()
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 819 VAARG_64, enumerator
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D | X86InstrCompiler.td | 84 // The VAARG_64 pseudo-instruction takes the address of the va_list, 87 def VAARG_64 : I<0, Pseudo, 90 "#VAARG_64 $dst, $ap, $size, $mode, $align",
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D | X86InstrInfo.td | 189 SDNode<"X86ISD::VAARG_64", SDT_X86VAARG_64,
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D | X86ISelLowering.cpp | 24355 X86ISD::VAARG_64, dl, VTs, InstOps, MVT::i64, MachinePointerInfo(SV), in LowerVAARG() 30945 NODE_NAME_CASE(VAARG_64) in getTargetNodeName() 33707 case X86::VAARG_64: in EmitInstrWithCustomInserter()
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/external/capstone/arch/X86/ |
D | X86GenAsmWriter_reduce.inc | 1613 844639978U, // VAARG_64 2862 // TEST8rm, VAARG_64 2876 // VAARG_64, VASTART_SAVE_XMM_REGS 2891 // VAARG_64
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D | X86GenAsmWriter1_reduce.inc | 1613 1787041655U, // VAARG_64 3331 1U, // VAARG_64 4305 // VAARG_64
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D | X86GenAsmWriter1.inc | 3037 2651874215U, // VAARG_64 11894 17488U, // VAARG_64 19873 // INSERTQI, VAARG_64, VADDPDZ128rmbk, VADDPDZ128rmbkz, VADDPDZ128rmk, VA... 19960 // VAARG_64, VBLENDVPDYrm, VBLENDVPDrm, VBLENDVPSYrm, VBLENDVPSrm, VFMADD... 20102 // VAARG_64, VADDPDZrbk, VADDPDZrbkz, VADDPSZrbk, VADDPSZrbkz, VADDSDZrrb... 20185 // VAARG_64, VPERMIL2PDmr, VPERMIL2PDmrY, VPERMIL2PDrm, VPERMIL2PDrmY, VP...
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D | X86GenAsmWriter.inc | 3037 2162191788U, // VAARG_64 11894 265U, // VAARG_64 20420 // TEST8rm, VAARG_64 20677 // VAARG_64
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 687 VAARG_64, enumerator
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D | X86InstrCompiler.td | 84 // The VAARG_64 pseudo-instruction takes the address of the va_list, 87 def VAARG_64 : I<0, Pseudo, 90 "#VAARG_64 $dst, $ap, $size, $mode, $align",
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D | X86InstrInfo.td | 196 SDNode<"X86ISD::VAARG_64", SDT_X86VAARG_64,
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D | X86ISelLowering.cpp | 23230 X86ISD::VAARG_64, dl, in LowerVAARG() 29802 case X86ISD::VAARG_64: return "X86ISD::VAARG_64"; in getTargetNodeName() 32382 case X86::VAARG_64: in EmitInstrWithCustomInserter()
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
D | X86GenAsmWriter1.inc | 4342 2719017446U, // VAARG_64 19593 279120U, // VAARG_64 32697 // VAARG_64, VBLENDVPDYrm, VBLENDVPDrm, VBLENDVPSYrm, VBLENDVPSrm, VFMADD... 32788 // VAARG_64, VADDPDZrrbk, VADDPDZrrbkz, VADDPSZrrbk, VADDPSZrrbkz, VADDSD... 32843 // VAARG_64
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D | X86GenAsmWriter.inc | 4633 1883354475U, // VAARG_64 19884 1U, // VAARG_64 35135 0U, // VAARG_64 48280 // VAARG_64
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D | X86GenInstrInfo.inc | 2981 VAARG_64 = 2966, 20666 …Inserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo328, -1 ,nullptr }, // Inst #2966 = VAARG_64
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