| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 938 VECREDUCE_AND, VECREDUCE_OR, VECREDUCE_XOR, enumerator
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/ |
| D | irtranslator-reductions.ll | 139 ; CHECK: [[VECREDUCE_AND:%[0-9]+]]:_(s32) = G_VECREDUCE_AND [[COPY]](<4 x s32>)
140 ; CHECK: $w0 = COPY [[VECREDUCE_AND]](s32)
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1152 VECREDUCE_AND, enumerator
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 477 case ISD::VECREDUCE_AND: in LegalizeOp()
873 case ISD::VECREDUCE_AND: in Expand()
|
| D | SelectionDAGDumper.cpp | 463 case ISD::VECREDUCE_AND: return "vecreduce_and"; in getOperationName()
|
| D | LegalizeIntegerTypes.cpp | 201 case ISD::VECREDUCE_AND: in PromoteIntegerResult()
1519 case ISD::VECREDUCE_AND: in PromoteIntegerOperand()
1965 case ISD::VECREDUCE_AND: in PromoteIntOp_VECREDUCE()
2158 case ISD::VECREDUCE_AND: in ExpandIntegerResult()
|
| D | LegalizeVectorTypes.cpp | 620 case ISD::VECREDUCE_AND: in ScalarizeVectorOperand()
2121 case ISD::VECREDUCE_AND: in SplitVectorOperand()
4393 case ISD::VECREDUCE_AND: in WidenVectorOperand()
|
| D | LegalizeDAG.cpp | 1168 case ISD::VECREDUCE_AND: in LegalizeOp()
3941 case ISD::VECREDUCE_AND: in ExpandNode()
|
| D | SelectionDAG.cpp | 359 case ISD::VECREDUCE_AND: in getVecReduceBaseOpcode()
4750 return getNode(ISD::VECREDUCE_AND, DL, VT, Operand); in getNode()
|
| D | DAGCombiner.cpp | 1740 case ISD::VECREDUCE_AND: in visit()
21162 if (Opcode == ISD::VECREDUCE_AND || Opcode == ISD::VECREDUCE_OR) { in visitVECREDUCE()
21163 unsigned NewOpcode = Opcode == ISD::VECREDUCE_AND in visitVECREDUCE()
|
| D | SelectionDAGBuilder.cpp | 9058 Res = DAG.getNode(ISD::VECREDUCE_AND, dl, VT, Op1); in visitVectorReduce()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 442 case ISD::VECREDUCE_AND: return "vecreduce_and"; in getOperationName()
|
| D | LegalizeVectorOps.cpp | 476 case ISD::VECREDUCE_AND: in LegalizeOp()
980 case ISD::VECREDUCE_AND: in Expand()
|
| D | LegalizeVectorTypes.cpp | 608 case ISD::VECREDUCE_AND: in ScalarizeVectorOperand()
1988 case ISD::VECREDUCE_AND: in SplitVectorOperand()
2074 case ISD::VECREDUCE_AND: CombineOpc = ISD::AND; break; in SplitVecOp_VECREDUCE()
4229 case ISD::VECREDUCE_AND: in WidenVectorOperand()
4699 case ISD::VECREDUCE_AND: in WidenVecOp_VECREDUCE()
|
| D | LegalizeIntegerTypes.cpp | 192 case ISD::VECREDUCE_AND: in PromoteIntegerResult()
1315 case ISD::VECREDUCE_AND: in PromoteIntegerOperand()
1738 case ISD::VECREDUCE_AND: in PromoteIntOp_VECREDUCE()
1921 case ISD::VECREDUCE_AND: in ExpandIntegerResult()
|
| D | LegalizeDAG.cpp | 1152 case ISD::VECREDUCE_AND: in LegalizeOp()
3801 case ISD::VECREDUCE_AND: in ExpandNode()
|
| D | DAGCombiner.cpp | 1617 case ISD::VECREDUCE_AND: in visit()
19755 if (Opcode == ISD::VECREDUCE_AND || Opcode == ISD::VECREDUCE_OR) { in visitVECREDUCE()
19756 unsigned NewOpcode = Opcode == ISD::VECREDUCE_AND in visitVECREDUCE()
|
| D | TargetLowering.cpp | 7615 case ISD::VECREDUCE_AND: BaseOpcode = ISD::AND; break; in expandVecReduce()
|
| D | SelectionDAGBuilder.cpp | 8987 Res = DAG.getNode(ISD::VECREDUCE_AND, dl, VT, Op1); in visitVectorReduce()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 716 setOperationAction(ISD::VECREDUCE_AND, VT, Expand); in initActions()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 834 setOperationAction(ISD::VECREDUCE_AND, VT, Expand); in initActions()
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1088 setOperationAction(ISD::VECREDUCE_AND, VT, Custom); in AArch64TargetLowering()
1109 setOperationAction(ISD::VECREDUCE_AND, VT, Custom); in AArch64TargetLowering()
1215 setOperationAction(ISD::VECREDUCE_AND, VT, Custom); in AArch64TargetLowering()
1363 setOperationAction(ISD::VECREDUCE_AND, VT, Custom); in addTypeForFixedLengthSVE()
4283 case ISD::VECREDUCE_AND: in LowerOperation()
10206 bool OverrideNEON = Op.getOpcode() == ISD::VECREDUCE_AND || in LowerVECREDUCE()
10221 case ISD::VECREDUCE_AND: in LowerVECREDUCE()
16783 case ISD::VECREDUCE_AND: { in LowerPredReductionToSVE()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 302 setOperationAction(ISD::VECREDUCE_AND, VT, Custom); in addMVEVectorTypes()
9534 case ISD::VECREDUCE_AND: BaseOpcode = ISD::AND; break; in LowerVecReduce()
9800 case ISD::VECREDUCE_AND: in LowerOperation()
|