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Searched refs:VECREDUCE_MUL (Results 1 – 22 of 22) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h937 VECREDUCE_ADD, VECREDUCE_MUL, enumerator
/external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/
Dirtranslator-reductions.ll125 ; CHECK: [[VECREDUCE_MUL:%[0-9]+]]:_(s32) = G_VECREDUCE_MUL [[COPY]](<4 x s32>)
126 ; CHECK: $w0 = COPY [[VECREDUCE_MUL]](s32)
/external/llvm-project/llvm/include/llvm/CodeGen/
DISDOpcodes.h1151 VECREDUCE_MUL, enumerator
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp476 case ISD::VECREDUCE_MUL: in LegalizeOp()
872 case ISD::VECREDUCE_MUL: in Expand()
DSelectionDAGDumper.cpp462 case ISD::VECREDUCE_MUL: return "vecreduce_mul"; in getOperationName()
DLegalizeIntegerTypes.cpp200 case ISD::VECREDUCE_MUL: in PromoteIntegerResult()
1518 case ISD::VECREDUCE_MUL: in PromoteIntegerOperand()
1964 case ISD::VECREDUCE_MUL: in PromoteIntOp_VECREDUCE()
2157 case ISD::VECREDUCE_MUL: in ExpandIntegerResult()
DLegalizeVectorTypes.cpp619 case ISD::VECREDUCE_MUL: in ScalarizeVectorOperand()
2120 case ISD::VECREDUCE_MUL: in SplitVectorOperand()
4392 case ISD::VECREDUCE_MUL: in WidenVectorOperand()
DLegalizeDAG.cpp1167 case ISD::VECREDUCE_MUL: in LegalizeOp()
3940 case ISD::VECREDUCE_MUL: in ExpandNode()
DSelectionDAG.cpp357 case ISD::VECREDUCE_MUL: in getVecReduceBaseOpcode()
DSelectionDAGBuilder.cpp9055 Res = DAG.getNode(ISD::VECREDUCE_MUL, dl, VT, Op1); in visitVectorReduce()
DDAGCombiner.cpp1739 case ISD::VECREDUCE_MUL: in visit()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp441 case ISD::VECREDUCE_MUL: return "vecreduce_mul"; in getOperationName()
DLegalizeVectorOps.cpp475 case ISD::VECREDUCE_MUL: in LegalizeOp()
979 case ISD::VECREDUCE_MUL: in Expand()
DLegalizeVectorTypes.cpp607 case ISD::VECREDUCE_MUL: in ScalarizeVectorOperand()
1987 case ISD::VECREDUCE_MUL: in SplitVectorOperand()
2073 case ISD::VECREDUCE_MUL: CombineOpc = ISD::MUL; break; in SplitVecOp_VECREDUCE()
4228 case ISD::VECREDUCE_MUL: in WidenVectorOperand()
4696 case ISD::VECREDUCE_MUL: in WidenVecOp_VECREDUCE()
DLegalizeIntegerTypes.cpp191 case ISD::VECREDUCE_MUL: in PromoteIntegerResult()
1314 case ISD::VECREDUCE_MUL: in PromoteIntegerOperand()
1737 case ISD::VECREDUCE_MUL: in PromoteIntOp_VECREDUCE()
1920 case ISD::VECREDUCE_MUL: in ExpandIntegerResult()
DLegalizeDAG.cpp1151 case ISD::VECREDUCE_MUL: in LegalizeOp()
3800 case ISD::VECREDUCE_MUL: in ExpandNode()
DTargetLowering.cpp7614 case ISD::VECREDUCE_MUL: BaseOpcode = ISD::MUL; break; in expandVecReduce()
DSelectionDAGBuilder.cpp8984 Res = DAG.getNode(ISD::VECREDUCE_MUL, dl, VT, Op1); in visitVectorReduce()
DDAGCombiner.cpp1616 case ISD::VECREDUCE_MUL: in visit()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetLoweringBase.cpp715 setOperationAction(ISD::VECREDUCE_MUL, VT, Expand); in initActions()
/external/llvm-project/llvm/lib/CodeGen/
DTargetLoweringBase.cpp833 setOperationAction(ISD::VECREDUCE_MUL, VT, Expand); in initActions()
/external/llvm-project/llvm/lib/Target/ARM/
DARMISelLowering.cpp301 setOperationAction(ISD::VECREDUCE_MUL, VT, Custom); in addMVEVectorTypes()
9533 case ISD::VECREDUCE_MUL: BaseOpcode = ISD::MUL; break; in LowerVecReduce()
9799 case ISD::VECREDUCE_MUL: in LowerOperation()