| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 938 VECREDUCE_AND, VECREDUCE_OR, VECREDUCE_XOR, enumerator
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/ |
| D | irtranslator-reductions.ll | 153 ; CHECK: [[VECREDUCE_OR:%[0-9]+]]:_(s32) = G_VECREDUCE_OR [[COPY]](<4 x s32>)
154 ; CHECK: $w0 = COPY [[VECREDUCE_OR]](s32)
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1153 VECREDUCE_OR, enumerator
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 478 case ISD::VECREDUCE_OR: in LegalizeOp()
874 case ISD::VECREDUCE_OR: in Expand()
|
| D | SelectionDAGDumper.cpp | 464 case ISD::VECREDUCE_OR: return "vecreduce_or"; in getOperationName()
|
| D | LegalizeIntegerTypes.cpp | 202 case ISD::VECREDUCE_OR: in PromoteIntegerResult()
1520 case ISD::VECREDUCE_OR: in PromoteIntegerOperand()
1966 case ISD::VECREDUCE_OR: in PromoteIntOp_VECREDUCE()
2159 case ISD::VECREDUCE_OR: in ExpandIntegerResult()
|
| D | LegalizeVectorTypes.cpp | 621 case ISD::VECREDUCE_OR: in ScalarizeVectorOperand()
2122 case ISD::VECREDUCE_OR: in SplitVectorOperand()
4394 case ISD::VECREDUCE_OR: in WidenVectorOperand()
|
| D | LegalizeDAG.cpp | 1169 case ISD::VECREDUCE_OR: in LegalizeOp()
3942 case ISD::VECREDUCE_OR: in ExpandNode()
|
| D | SelectionDAG.cpp | 361 case ISD::VECREDUCE_OR: in getVecReduceBaseOpcode()
4745 return getNode(ISD::VECREDUCE_OR, DL, VT, Operand); in getNode()
|
| D | DAGCombiner.cpp | 1741 case ISD::VECREDUCE_OR: in visit()
21162 if (Opcode == ISD::VECREDUCE_AND || Opcode == ISD::VECREDUCE_OR) { in visitVECREDUCE()
|
| D | SelectionDAGBuilder.cpp | 9061 Res = DAG.getNode(ISD::VECREDUCE_OR, dl, VT, Op1); in visitVectorReduce()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 443 case ISD::VECREDUCE_OR: return "vecreduce_or"; in getOperationName()
|
| D | LegalizeVectorOps.cpp | 477 case ISD::VECREDUCE_OR: in LegalizeOp()
981 case ISD::VECREDUCE_OR: in Expand()
|
| D | LegalizeVectorTypes.cpp | 609 case ISD::VECREDUCE_OR: in ScalarizeVectorOperand()
1989 case ISD::VECREDUCE_OR: in SplitVectorOperand()
2075 case ISD::VECREDUCE_OR: CombineOpc = ISD::OR; break; in SplitVecOp_VECREDUCE()
4230 case ISD::VECREDUCE_OR: in WidenVectorOperand()
4691 case ISD::VECREDUCE_OR: in WidenVecOp_VECREDUCE()
|
| D | LegalizeIntegerTypes.cpp | 193 case ISD::VECREDUCE_OR: in PromoteIntegerResult()
1316 case ISD::VECREDUCE_OR: in PromoteIntegerOperand()
1739 case ISD::VECREDUCE_OR: in PromoteIntOp_VECREDUCE()
1922 case ISD::VECREDUCE_OR: in ExpandIntegerResult()
|
| D | LegalizeDAG.cpp | 1153 case ISD::VECREDUCE_OR: in LegalizeOp()
3802 case ISD::VECREDUCE_OR: in ExpandNode()
|
| D | TargetLowering.cpp | 7616 case ISD::VECREDUCE_OR: BaseOpcode = ISD::OR; break; in expandVecReduce()
|
| D | DAGCombiner.cpp | 1618 case ISD::VECREDUCE_OR: in visit()
19755 if (Opcode == ISD::VECREDUCE_AND || Opcode == ISD::VECREDUCE_OR) { in visitVECREDUCE()
|
| D | SelectionDAGBuilder.cpp | 8990 Res = DAG.getNode(ISD::VECREDUCE_OR, dl, VT, Op1); in visitVectorReduce()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 717 setOperationAction(ISD::VECREDUCE_OR, VT, Expand); in initActions()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 835 setOperationAction(ISD::VECREDUCE_OR, VT, Expand); in initActions()
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1089 setOperationAction(ISD::VECREDUCE_OR, VT, Custom); in AArch64TargetLowering()
1110 setOperationAction(ISD::VECREDUCE_OR, VT, Custom); in AArch64TargetLowering()
1216 setOperationAction(ISD::VECREDUCE_OR, VT, Custom); in AArch64TargetLowering()
1368 setOperationAction(ISD::VECREDUCE_OR, VT, Custom); in addTypeForFixedLengthSVE()
4284 case ISD::VECREDUCE_OR: in LowerOperation()
10207 Op.getOpcode() == ISD::VECREDUCE_OR || in LowerVECREDUCE()
10223 case ISD::VECREDUCE_OR: in LowerVECREDUCE()
16781 case ISD::VECREDUCE_OR: in LowerPredReductionToSVE()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 303 setOperationAction(ISD::VECREDUCE_OR, VT, Custom); in addMVEVectorTypes()
9535 case ISD::VECREDUCE_OR: BaseOpcode = ISD::OR; break; in LowerVecReduce()
9801 case ISD::VECREDUCE_OR: in LowerOperation()
|