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Searched refs:VIRGL_FORMAT_R10SG10SB10SA2U_NORM (Results 1 – 3 of 3) sorted by relevance

/external/mesa3d/src/virtio/virtio-gpu/
Dvirgl_hw.h183 VIRGL_FORMAT_R10SG10SB10SA2U_NORM = 132, enumerator
/external/virglrenderer/src/
Dvirgl_hw.h183 VIRGL_FORMAT_R10SG10SB10SA2U_NORM = 132, enumerator
/external/virglrenderer/src/gallium/include/pipe/
Dp_format.h183 #define PIPE_FORMAT_R10SG10SB10SA2U_NORM VIRGL_FORMAT_R10SG10SB10SA2U_NORM