Searched refs:VIV_ISA_WORD_3_SEL_BIT1 (Results 1 – 2 of 2) sorted by relevance
108 COND(inst->sel_bit1, VIV_ISA_WORD_3_SEL_BIT1) | in etna_assemble()
312 #define VIV_ISA_WORD_3_SEL_BIT1 0x01000000 macro