| /external/swiftshader/third_party/subzero/src/ |
| D | IceClFlags.cpp | 198 Ice::VerboseMask VMask = Ice::IceV_None; in toSetterParam() local
203 VMask |= Param[i]; in toSetterParam()
205 return VMask; in toSetterParam()
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| D | IceCfg.h | 55 return VMask & Mask;
57 void setVerbose(VerboseMask Mask) { VMask = Mask; } in setVerbose()
303 VerboseMask VMask; variable
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| D | IceCfg.cpp | 39 VMask(getFlags().getVerbose()), FunctionName(), in Cfg()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 1904 SDValue VMask = Node->getOperand(5); in tryGather() local
1918 Disp, Segment, VMask, Chain}; in tryGather()
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| D | X86ISelLowering.cpp | 7422 SDValue VMask = DAG.getBuildVector(VT, DL, VMaskOps); in lowerVectorShuffleAsBitMask() local
7425 DL, VT, V, VMask); in lowerVectorShuffleAsBitMask()
8831 SmallVectorImpl<int> &VMask = (UnpackIdx % 2 == 0) ? V1Mask : V2Mask; in lowerVectorShuffleAsPermuteAndUnpack() local
8832 VMask[(UnpackIdx / 2) * Scale + i % Scale + (UnpackLo ? 0 : Size / 2)] = in lowerVectorShuffleAsPermuteAndUnpack()
17229 SDValue VMask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl); in getVectorMaskingNode() local
17237 return DAG.getNode(ISD::AND, dl, VT, Op, VMask); in getVectorMaskingNode()
17240 return DAG.getNode(ISD::OR, dl, VT, Op, VMask); in getVectorMaskingNode()
17253 return DAG.getNode(OpcodeSelect, dl, VT, VMask, Op, PreservedSrc); in getVectorMaskingNode()
17909 SDValue VMask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl); in LowerINTRINSIC_WO_CHAIN() local
17910 return DAG.getNode(IntrData->Opc0, dl, VT, VMask); in LowerINTRINSIC_WO_CHAIN()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 10813 SDValue VMask = getMaskNode(MaskNode, MVT::getVectorVT(MVT::i1, NumElts), in lowerShuffleToEXPAND() local
10817 return DAG.getNode(X86ISD::EXPAND, DL, VT, ExpandedVector, ZeroVector, VMask); in lowerShuffleToEXPAND()
11138 SDValue VMask = DAG.getBuildVector(MaskVT, DL, VMaskOps); in lowerShuffleAsBitMask() local
11139 VMask = DAG.getBitcast(LogicVT, VMask); in lowerShuffleAsBitMask()
11141 SDValue And = DAG.getNode(ISD::AND, DL, LogicVT, V, VMask); in lowerShuffleAsBitMask()
13033 SmallVectorImpl<int> &VMask = (UnpackIdx % 2 == 0) ? V1Mask : V2Mask; in lowerShuffleAsPermuteAndUnpack() local
13034 VMask[(UnpackIdx / 2) * Scale + i % Scale + (UnpackLo ? 0 : Size / 2)] = in lowerShuffleAsPermuteAndUnpack()
23486 SDValue VMask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl); in getVectorMaskingNode() local
23490 return DAG.getNode(OpcodeSelect, dl, VT, VMask, Op, PreservedSrc); in getVectorMaskingNode()
24638 SDValue VMask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl); in getPrefetchNode() local
[all …]
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 11196 SDValue VMask = getMaskNode(MaskNode, MVT::getVectorVT(MVT::i1, NumElts), in lowerShuffleToEXPAND() local
11200 return DAG.getNode(X86ISD::EXPAND, DL, VT, ExpandedVector, ZeroVector, VMask); in lowerShuffleToEXPAND()
11757 SDValue VMask = DAG.getBuildVector(MaskVT, DL, VMaskOps); in lowerShuffleAsBitMask() local
11758 VMask = DAG.getBitcast(LogicVT, VMask); in lowerShuffleAsBitMask()
11760 SDValue And = DAG.getNode(ISD::AND, DL, LogicVT, V, VMask); in lowerShuffleAsBitMask()
13774 SmallVectorImpl<int> &VMask = (UnpackIdx % 2 == 0) ? V1Mask : V2Mask; in lowerShuffleAsPermuteAndUnpack() local
13775 VMask[(UnpackIdx / 2) * Scale + i % Scale + (UnpackLo ? 0 : Size / 2)] = in lowerShuffleAsPermuteAndUnpack()
24611 SDValue VMask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl); in getVectorMaskingNode() local
24615 return DAG.getNode(OpcodeSelect, dl, VT, VMask, Op, PreservedSrc); in getVectorMaskingNode()
25786 SDValue VMask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl); in getPrefetchNode() local
[all …]
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