| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIInstrFormats.td | 31 field bit VOP3 = 0;
81 // This bit indicates that this is a VOP3 opcode which supports op_sel
151 let TSFlags{10} = VOP3;
213 let hasExtraSrcRegAllocReq = !or(VOP1, VOP2, VOP3, VOPC, SDWA, VALU);
|
| D | VOPInstructions.td | 64 // Using complex patterns gives VOP3 patterns a very high complexity rating,
70 let VOP3 = 1;
72 let AsmVariantName = AMDGPUAsmVariants.VOP3;
111 // Using complex patterns gives VOP3 patterns a very high complexity rating,
117 let VOP3 = 1;
129 let AsmVariantName = AMDGPUAsmVariants.VOP3;
169 // XXX - Is there any reason to distinguish this from regular VOP3
|
| D | SIDefines.h | 37 VOP3 = 1 << 10, enumerator
234 VOP3 = 1, enumerator
|
| D | AMDGPU.td | 551 "Can use one literal in VOP3"
1009 string VOP3 = "VOP3";
1028 let Name = AMDGPUAsmVariants.VOP3;
|
| D | SIInstrInfo.td | 1431 3))); // VOP3
1505 // Returns the register class to use for sources of VOP3 instructions for the
1591 // Returns the input arguments for VOP3 instructions for the given SrcVT.
1633 // VOP3 with modifiers
1647 // VOP3 with modifiers except src2
1660 // VOP3 without modifiers
1885 // Returns the assembly string for the inputs and outputs of a VOP3
2046 0, // NumSrcArgs == 3 - No DPP or SDWA for VOP3
2366 let ColFields = ["Size", "VOP3"];
2375 let ColFields = ["Size", "VOP3"];
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrFormats.td | 31 field bit VOP3 = 0;
80 // This bit indicates that this is a VOP3 opcode which supports op_sel
143 let TSFlags{10} = VOP3;
207 …let hasExtraSrcRegAllocReq = !if(VOP1,1,!if(VOP2,1,!if(VOP3,1,!if(VOPC,1,!if(SDWA,1, !if(VALU,1,0)…
|
| D | VOPInstructions.td | 61 // Using complex patterns gives VOP3 patterns a very high complexity rating,
67 let VOP3 = 1;
69 let AsmVariantName = AMDGPUAsmVariants.VOP3;
108 // Using complex patterns gives VOP3 patterns a very high complexity rating,
114 let VOP3 = 1;
123 let AsmVariantName = AMDGPUAsmVariants.VOP3;
163 // XXX - Is there any reason to distingusih this from regular VOP3
|
| D | SIDefines.h | 37 VOP3 = 1 << 10, enumerator
229 VOP3 = 1, enumerator
|
| D | AMDGPU.td | 478 "Can use one literal in VOP3"
915 string VOP3 = "VOP3";
934 let Name = AMDGPUAsmVariants.VOP3;
|
| D | SIInstrInfo.td | 1441 3))); // VOP3
1511 // Returns the register class to use for sources of VOP3 instructions for the
1599 // Returns the input arguments for VOP3 instructions for the given SrcVT.
1641 // VOP3 with modifiers
1655 // VOP3 with modifiers except src2
1668 // VOP3 without modifiers
1893 // Returns the assembly string for the inputs and outputs of a VOP3
2054 0, // NumSrcArgs == 3 - No DPP or SDWA for VOP3
2383 let ColFields = ["Size", "VOP3"];
2392 let ColFields = ["Size", "VOP3"];
|
| D | SIInstrInfo.h | 422 return MI.getDesc().TSFlags & SIInstrFlags::VOP3; in isVOP3()
426 return get(Opcode).TSFlags & SIInstrFlags::VOP3; in isVOP3()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | VIInstructions.td | 79 // VOP3 Instructions
89 // are VOP2 on SI and VOP3 on VI.
|
| D | SIInstrFormats.td | 33 field bits<1> VOP3 = 0;
69 let TSFlags{12} = VOP3;
151 // Using complex patterns gives VOP3 patterns a very high complexity rating,
157 let VOP3 = 1;
429 // Encoding used for VOPC instructions encoded as VOP3
|
| D | SIDefines.h | 30 VOP3 = 1 << 12, enumerator
|
| D | SIInstrInfo.h | 264 return MI.getDesc().TSFlags & SIInstrFlags::VOP3; in isVOP3()
268 return get(Opcode).TSFlags & SIInstrFlags::VOP3; in isVOP3()
|
| D | VIInstrFormats.td | 146 // Encoding used for VOPC instructions encoded as VOP3
|
| D | CIInstructions.td | 59 // VOP3 Instructions
|
| /external/llvm-project/llvm/docs/ |
| D | AMDGPUInstructionSyntax.rst | 126 they may also be encoded in *VOP3*, *DPP* and *SDWA* formats.
135 *VOP3* (64-bit) encoding _e64
|
| D | AMDGPUInstructionNotation.rst | 71 :ref:`VOP3 operand modifiers<amdgpu_synid_vop3_operand_modifiers>` or
|
| /external/mesa3d/src/amd/compiler/ |
| D | aco_ir.cpp | 172 if (instr->format == Format::VOP3) in can_use_SDWA()
228 …Format format = (Format)(((uint16_t)tmp->format & ~(uint16_t)Format::VOP3) | (uint16_t)Format::SDW… in convert_to_SDWA()
|
| D | aco_validate.cpp | 126 base_format = Format::VOP3; in validate_ir()
134 if (((uint32_t)instr->format & (uint32_t)Format::VOP3) && instr->format != Format::VOP3) { in validate_ir()
|
| D | aco_opcodes.py | 950 VOP3 = { variable
1083 for (gfx6, gfx7, gfx8, gfx9, gfx10, name, in_mod, out_mod) in VOP3:
|
| /external/llvm-project/llvm/docs/AMDGPU/ |
| D | AMDGPUAsmGFX906.rst | 49 VOP3 section in Instructions
|
| /external/llvm/docs/ |
| D | AMDGPUUsage.rst | 101 VOP1, VOP2, VOP3, VOPC Instructions
|
| /external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
| D | add.ll | 162 ; Make sure the VOP3 form of add is initially selected. Otherwise pair
|