Searched refs:VPU_G1_PWR_REQ (Results 1 – 3 of 3) sorted by relevance
274 mmio_write_32(IMX_GPC_BASE + PU_PGC_DN_TRG, VPU_G1_PWR_REQ | in imx_gpc_pm_domain_enable()277 while (mmio_read_32(IMX_GPC_BASE + PU_PGC_DN_TRG) & (VPU_G1_PWR_REQ | in imx_gpc_pm_domain_enable()
93 #define VPU_G1_PWR_REQ BIT(11) macro
100 #define VPU_G1_PWR_REQ BIT(11) macro