Searched refs:VSHLDQ (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 308 VSHLDQ, VSRLDQ, enumerator
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| D | X86InstrFragmentsSIMD.td | 172 def X86vshldq : SDNode<"X86ISD::VSHLDQ", SDTIntShiftOp>;
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| D | X86ISelLowering.cpp | 3801 case X86ISD::VSHLDQ: in isTargetShuffle()
4899 case X86ISD::VSHLDQ: in getTargetShuffleMask()
5475 unsigned Opc = isLeft ? X86ISD::VSHLDQ : X86ISD::VSRLDQ; in getVShift()
7817 SDValue LoShift = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Lo, in lowerVectorShuffleAsByteRotate()
7878 unsigned OpCode = Left ? (ByteShift ? X86ISD::VSHLDQ : X86ISD::VSHLI) in lowerVectorShuffleAsShift()
8467 X86ISD::VSHLDQ, DL, MVT::v16i8, V2, in lowerVectorShuffleAsElementInsertion()
22185 case X86ISD::VSHLDQ: return "X86ISD::VSHLDQ"; in getTargetNodeName()
30997 case X86ISD::VSHLDQ: in PerformDAGCombine()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 346 VSHLDQ, enumerator
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| D | X86InstrFragmentsSIMD.td | 195 def X86vshldq : SDNode<"X86ISD::VSHLDQ", X86vshiftimm>;
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| D | X86ISelLowering.cpp | 4795 case X86ISD::VSHLDQ: in isTargetShuffle()
6980 case X86ISD::VSHLDQ: in getTargetShuffleMask()
8221 unsigned Opc = isLeft ? X86ISD::VSHLDQ : X86ISD::VSRLDQ; in getVShift()
12518 DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Lo, in lowerShuffleAsByteRotate()
12594 Res = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Res, in lowerShuffleAsByteShiftMask()
12602 Res = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Res, in lowerShuffleAsByteShiftMask()
12609 Res = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Res, in lowerShuffleAsByteShiftMask()
12614 Res = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Res, in lowerShuffleAsByteShiftMask()
12672 Opcode = Left ? (ByteShift ? X86ISD::VSHLDQ : X86ISD::VSHLI) in matchShuffleAsShift()
13295 V2 = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, V2, in lowerShuffleAsElementInsertion()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 306 VSHLDQ, VSRLDQ, enumerator
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| D | X86InstrFragmentsSIMD.td | 191 def X86vshldq : SDNode<"X86ISD::VSHLDQ", X86vshiftimm>;
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| D | X86ISelLowering.cpp | 4697 case X86ISD::VSHLDQ: in isTargetShuffle()
6686 case X86ISD::VSHLDQ: in getTargetShuffleMask()
7930 unsigned Opc = isLeft ? X86ISD::VSHLDQ : X86ISD::VSRLDQ; in getVShift()
11772 DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Lo, in lowerShuffleAsByteRotate()
11848 Res = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Res, in lowerShuffleAsByteShiftMask()
11856 Res = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Res, in lowerShuffleAsByteShiftMask()
11863 Res = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Res, in lowerShuffleAsByteShiftMask()
11868 Res = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Res, in lowerShuffleAsByteShiftMask()
11926 Opcode = Left ? (ByteShift ? X86ISD::VSHLDQ : X86ISD::VSHLI) in matchShuffleAsShift()
12549 V2 = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, V2, in lowerShuffleAsElementInsertion()
[all …]
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