/external/llvm/test/CodeGen/X86/ |
D | vshift-6.ll | 11 ; A = VSHLI(MVT::v8i16, r & (char16)15, 4) 15 ; C = VSHLI(MVT::v8i16, r & (char16)63, 2)
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/external/llvm-project/llvm/test/CodeGen/X86/ |
D | vshift-6.ll | 13 ; A = VSHLI(MVT::v8i16, r & (char16)15, 4) 17 ; C = VSHLI(MVT::v8i16, r & (char16)63, 2)
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D | vshli-simplify-demanded-bits.ll | 4 ; A combine forming X86ISD::VSHLI was missing a test and not using
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/external/llvm/lib/Target/X86/ |
D | X86IntrinsicsInfo.h | 301 X86_INTRINSIC_DATA(avx2_pslli_d, VSHIFT, X86ISD::VSHLI, 0), 302 X86_INTRINSIC_DATA(avx2_pslli_q, VSHIFT, X86ISD::VSHLI, 0), 303 X86_INTRINSIC_DATA(avx2_pslli_w, VSHIFT, X86ISD::VSHLI, 0), 1245 X86_INTRINSIC_DATA(avx512_mask_psll_di_128, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VSHLI, 0), 1246 X86_INTRINSIC_DATA(avx512_mask_psll_di_256, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VSHLI, 0), 1247 X86_INTRINSIC_DATA(avx512_mask_psll_di_512, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VSHLI, 0), 1251 X86_INTRINSIC_DATA(avx512_mask_psll_qi_128, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VSHLI, 0), 1252 X86_INTRINSIC_DATA(avx512_mask_psll_qi_256, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VSHLI, 0), 1253 X86_INTRINSIC_DATA(avx512_mask_psll_qi_512, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VSHLI, 0), 1257 X86_INTRINSIC_DATA(avx512_mask_psll_wi_128, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VSHLI, 0), [all …]
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D | X86ISelLowering.h | 319 VSHLI, VSRLI, VSRAI, enumerator
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D | X86InstrFragmentsSIMD.td | 217 def X86vshli : SDNode<"X86ISD::VSHLI", SDTIntShiftOp>;
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D | X86ISelLowering.cpp | 4605 WideSubVec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, WideSubVec, ShiftBits); in insert1BitVector() 4614 Vec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, WideSubVec, in insert1BitVector() 4626 Vec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 4638 WideSubVec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, WideSubVec, in insert1BitVector() 4642 Vec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 7878 unsigned OpCode = Left ? (ByteShift ? X86ISD::VSHLDQ : X86ISD::VSHLI) in lowerVectorShuffleAsShift() 12412 Vec = DAG.getNode(X86ISD::VSHLI, dl, VecVT, Vec, in ExtractBitFromMaskVector() 12548 EltInVec = DAG.getNode(X86ISD::VSHLI, dl, VecVT, EltInVec, in InsertBitToMaskVector() 17053 assert((Opc == X86ISD::VSHLI || Opc == X86ISD::VSRLI || Opc == X86ISD::VSRAI) in getTargetVShiftByConstNode() 17066 case X86ISD::VSHLI: in getTargetVShiftByConstNode() [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86IntrinsicsInfo.h | 395 X86_INTRINSIC_DATA(avx2_pslli_d, VSHIFT, X86ISD::VSHLI, 0), 396 X86_INTRINSIC_DATA(avx2_pslli_q, VSHIFT, X86ISD::VSHLI, 0), 397 X86_INTRINSIC_DATA(avx2_pslli_w, VSHIFT, X86ISD::VSHLI, 0), 853 X86_INTRINSIC_DATA(avx512_pslli_d_512, VSHIFT, X86ISD::VSHLI, 0), 854 X86_INTRINSIC_DATA(avx512_pslli_q_512, VSHIFT, X86ISD::VSHLI, 0), 855 X86_INTRINSIC_DATA(avx512_pslli_w_512, VSHIFT, X86ISD::VSHLI, 0), 1059 X86_INTRINSIC_DATA(sse2_pslli_d, VSHIFT, X86ISD::VSHLI, 0), 1060 X86_INTRINSIC_DATA(sse2_pslli_q, VSHIFT, X86ISD::VSHLI, 0), 1061 X86_INTRINSIC_DATA(sse2_pslli_w, VSHIFT, X86ISD::VSHLI, 0),
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D | X86ISelLowering.h | 315 VSHLI, VSRLI, VSRAI, enumerator
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D | X86ISelLowering.cpp | 7415 case X86ISD::VSHLI: in getFauxShuffleMask() 7436 if (X86ISD::VSHLI == Opcode) { in getFauxShuffleMask() 11926 Opcode = Left ? (ByteShift ? X86ISD::VSHLDQ : X86ISD::VSHLI) in matchShuffleAsShift() 23269 case X86ISD::VSHLI: in getTargetVShiftUniformOpcode() 23270 return IsVariable ? X86ISD::VSHL : X86ISD::VSHLI; in getTargetVShiftUniformOpcode() 23307 assert((Opc == X86ISD::VSHLI || Opc == X86ISD::VSRLI || Opc == X86ISD::VSRAI) in getTargetVShiftByConstNode() 23318 case X86ISD::VSHLI: in getTargetVShiftByConstNode() 26017 Hi = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, VT, Hi, 32, DAG); in LowerMUL() 26438 SDValue SHL = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, ShiftVT, R, in LowerScalarImmediateShift() 26942 Amt = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, ExtVT, Amt, 5, DAG); in LowerShift() [all …]
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D | X86InstrFragmentsSIMD.td | 237 def X86vshli : SDNode<"X86ISD::VSHLI", X86vshiftimm>;
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86IntrinsicsInfo.h | 395 X86_INTRINSIC_DATA(avx2_pslli_d, VSHIFT, X86ISD::VSHLI, 0), 396 X86_INTRINSIC_DATA(avx2_pslli_q, VSHIFT, X86ISD::VSHLI, 0), 397 X86_INTRINSIC_DATA(avx2_pslli_w, VSHIFT, X86ISD::VSHLI, 0), 849 X86_INTRINSIC_DATA(avx512_pslli_d_512, VSHIFT, X86ISD::VSHLI, 0), 850 X86_INTRINSIC_DATA(avx512_pslli_q_512, VSHIFT, X86ISD::VSHLI, 0), 851 X86_INTRINSIC_DATA(avx512_pslli_w_512, VSHIFT, X86ISD::VSHLI, 0), 1065 X86_INTRINSIC_DATA(sse2_pslli_d, VSHIFT, X86ISD::VSHLI, 0), 1066 X86_INTRINSIC_DATA(sse2_pslli_q, VSHIFT, X86ISD::VSHLI, 0), 1067 X86_INTRINSIC_DATA(sse2_pslli_w, VSHIFT, X86ISD::VSHLI, 0),
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D | X86ISelLowering.h | 360 VSHLI, enumerator
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D | X86ISelLowering.cpp | 7700 case X86ISD::VSHLI: in getFauxShuffleMask() 7719 if (X86ISD::VSHLI == Opcode) { in getFauxShuffleMask() 12356 SDValue SHL = DAG.getNode(X86ISD::VSHLI, DL, RotateVT, V1, in lowerShuffleAsBitRotate() 12672 Opcode = Left ? (ByteShift ? X86ISD::VSHLDQ : X86ISD::VSHLI) in matchShuffleAsShift() 24391 case X86ISD::VSHLI: in getTargetVShiftUniformOpcode() 24392 return IsVariable ? X86ISD::VSHL : X86ISD::VSHLI; in getTargetVShiftUniformOpcode() 24429 assert((Opc == X86ISD::VSHLI || Opc == X86ISD::VSRLI || Opc == X86ISD::VSRAI) in getTargetVShiftByConstNode() 24440 case X86ISD::VSHLI: in getTargetVShiftByConstNode() 27131 Hi = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, VT, Hi, 32, DAG); in LowerMUL() 27524 SDValue SHL = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, ShiftVT, R, in LowerScalarImmediateShift() [all …]
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D | X86InstrFragmentsSIMD.td | 246 def X86vshli : SDNode<"X86ISD::VSHLI", X86vshiftimm>;
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