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Searched refs:VZEXT_MOVL (Results 1 – 11 of 11) sorted by relevance

/external/llvm/lib/Target/X86/
DX86ISelLowering.h283 VZEXT_MOVL, enumerator
DX86InstrFragmentsSIMD.td114 def X86vzmovl : SDNode<"X86ISD::VZEXT_MOVL",
DX86ISelDAGToDAG.cpp1532 if (N.getOpcode() == X86ISD::VZEXT_MOVL && N.getNode()->hasOneUse() && in selectScalarSSELoad()
DX86ISelLowering.cpp3823 case X86ISD::VZEXT_MOVL: in isTargetShuffle()
4783 if (MaskNode.getOpcode() == X86ISD::VZEXT_MOVL && in getTargetShuffleMaskIndices()
4927 case X86ISD::VZEXT_MOVL: in getTargetShuffleMask()
5729 V = DAG.getNode(X86ISD::VZEXT_MOVL, DL, VecVT, V); in EltsFromConsecutiveLoads()
8330 V = DAG.getNode(X86ISD::VZEXT_MOVL, DL, MVT::v2i64, V); in lowerVectorShuffleAsZeroOrAnyExtend()
8451 V2 = DAG.getNode(X86ISD::VZEXT_MOVL, DL, ExtVT, V2); in lowerVectorShuffleAsElementInsertion()
22172 case X86ISD::VZEXT_MOVL: return "X86ISD::VZEXT_MOVL"; in getTargetNodeName()
24759 Shuffle = X86ISD::VZEXT_MOVL; in matchUnaryVectorShuffle()
30985 case X86ISD::VZEXT_MOVL: return combineVZextMovl(N, DAG); in PerformDAGCombine()
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.h313 VZEXT_MOVL, enumerator
DX86InstrFragmentsSIMD.td103 def X86vzmovl : SDNode<"X86ISD::VZEXT_MOVL",
DX86ISelLowering.cpp4816 case X86ISD::VZEXT_MOVL: in isTargetShuffle()
6643 if (Op.getOpcode() == X86ISD::VZEXT_MOVL && in getTargetConstantBitsFromNode()
7013 case X86ISD::VZEXT_MOVL: in getTargetShuffleMask()
13162 V = DAG.getNode(X86ISD::VZEXT_MOVL, DL, MVT::v2i64, V); in lowerShuffleAsZeroOrAnyExtend()
13280 V2 = DAG.getNode(X86ISD::VZEXT_MOVL, DL, ExtVT, V2); in lowerShuffleAsElementInsertion()
30833 NODE_NAME_CASE(VZEXT_MOVL) in getTargetNodeName()
34492 Shuffle = X86ISD::VZEXT_MOVL; in matchUnaryShuffle()
34498 Shuffle = X86ISD::VZEXT_MOVL; in matchUnaryShuffle()
34546 Shuffle = X86ISD::VZEXT_MOVL; in matchUnaryShuffle()
36848 case X86ISD::VZEXT_MOVL: { in combineTargetShuffle()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.h282 VZEXT_MOVL, enumerator
DX86InstrFragmentsSIMD.td99 def X86vzmovl : SDNode<"X86ISD::VZEXT_MOVL",
DX86ISelLowering.cpp4718 case X86ISD::VZEXT_MOVL: in isTargetShuffle()
6363 if (Op.getOpcode() == X86ISD::VZEXT_MOVL && in getTargetConstantBitsFromNode()
6724 case X86ISD::VZEXT_MOVL: in getTargetShuffleMask()
12416 V = DAG.getNode(X86ISD::VZEXT_MOVL, DL, MVT::v2i64, V); in lowerShuffleAsZeroOrAnyExtend()
12534 V2 = DAG.getNode(X86ISD::VZEXT_MOVL, DL, ExtVT, V2); in lowerShuffleAsElementInsertion()
29693 case X86ISD::VZEXT_MOVL: return "X86ISD::VZEXT_MOVL"; in getTargetNodeName()
32882 Shuffle = X86ISD::VZEXT_MOVL; in matchUnaryShuffle()
32929 Shuffle = X86ISD::VZEXT_MOVL; in matchUnaryShuffle()
35287 if (N->getOpcode() == X86ISD::VZEXT_MOVL && in combineShuffle()
35323 if (N->getOpcode() == X86ISD::VZEXT_MOVL && !DCI.isBeforeLegalizeOps() && in combineShuffle()
[all …]
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc6789 // FastEmit functions for X86ISD::VZEXT_MOVL.
6950 case X86ISD::VZEXT_MOVL: return fastEmit_X86ISD_VZEXT_MOVL_r(VT, RetVT, Op0, Op0IsKill);