| /external/deqp/modules/glshared/ |
| D | glsLongStressCase.hpp | 82 template <int ValSize>
83 …void set (const tcu::Vector<float, ValSize>& minValue_, const tcu::Vector<float, ValSize>& maxValu… in set()
85 type = glu::getDataTypeFloatVec(ValSize); in set()
105 template <int ValSize>
106 void set (const tcu::Vector<int, ValSize>& minValue_, const tcu::Vector<int, ValSize>& maxValue_) in set()
108 type = glu::getDataTypeVector(glu::TYPE_INT, ValSize); in set()
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| /external/llvm-project/llvm/lib/IR/ |
| D | AttributeImpl.h | 151 unsigned ValSize; variable
153 return KindSize + 1 + ValSize + 1; in numTrailingObjects()
159 ValSize(Val.size()) { in AttributeImpl()
165 TrailingString[KindSize + 1 + ValSize] = '\0'; in AttributeImpl()
172 return StringRef(getTrailingObjects<char>() + KindSize + 1, ValSize); in getStringValue()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86CallLowering.cpp | 137 unsigned ValSize = VA.getValVT().getSizeInBits(); in assignValueToReg() local
139 if (PhysRegSize > ValSize && LocSize == ValSize) { in assignValueToReg()
271 unsigned ValSize = VA.getValVT().getSizeInBits(); in assignValueToReg() local
273 if (PhysRegSize > ValSize && LocSize == ValSize) { in assignValueToReg()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86CallLowering.cpp | 134 unsigned ValSize = VA.getValVT().getSizeInBits(); in assignValueToReg() local
136 if (PhysRegSize > ValSize && LocSize == ValSize) { in assignValueToReg()
269 unsigned ValSize = VA.getValVT().getSizeInBits(); in assignValueToReg() local
271 if (PhysRegSize > ValSize && LocSize == ValSize) { in assignValueToReg()
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| /external/llvm/lib/Fuzzer/ |
| D | FuzzerTraceState.cpp | 364 size_t ValSize = ValSizeInBits / 8; in DFSanSwitchCallback() local
369 for (size_t Pos = LR.Beg; Pos + ValSize <= LR.End; Pos++) in DFSanSwitchCallback()
371 AddMutation(Pos, ValSize, Cases[i]); in DFSanSwitchCallback()
381 PC, Val, ValSize, NumCases, L, LR.Beg, LR.End, TryShort); in DFSanSwitchCallback()
461 size_t ValSize = ValSizeInBits / 8; in TraceSwitchCallback() local
471 TryToAddDesiredData(Val, Cases[i], ValSize); in TraceSwitchCallback()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMCallLowering.cpp | 338 uint64_t ValSize = VA.getValVT().getFixedSizeInBits(); in assignValueToReg() local
341 assert(ValSize <= 64 && "Unsupported value size"); in assignValueToReg()
345 if (ValSize == LocSize) { in assignValueToReg()
348 assert(ValSize < LocSize && "Extensions not supported"); in assignValueToReg()
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| D | ARMInstructionSelector.cpp | 1090 const auto ValSize = ValTy.getSizeInBits(); in select() local
1092 assert((ValSize != 64 || STI.hasVFP2Base()) && in select()
1095 const auto NewOpc = selectLoadStoreOpCode(I.getOpcode(), RegBank, ValSize); in select()
1099 if (ValSize == 1 && NewOpc == Opcodes.STORE8) { in select()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMCallLowering.cpp | 342 auto ValSize = VA.getValVT().getSizeInBits(); in assignValueToReg() local
345 assert(ValSize <= 64 && "Unsupported value size"); in assignValueToReg()
349 if (ValSize == LocSize) { in assignValueToReg()
352 assert(ValSize < LocSize && "Extensions not supported"); in assignValueToReg()
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| D | ARMInstructionSelector.cpp | 1092 const auto ValSize = ValTy.getSizeInBits(); in select() local
1094 assert((ValSize != 64 || STI.hasVFP2Base()) && in select()
1097 const auto NewOpc = selectLoadStoreOpCode(I.getOpcode(), RegBank, ValSize); in select()
1101 if (ValSize == 1 && NewOpc == Opcodes.STORE8) { in select()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64LegalizerInfo.cpp | 754 uint64_t ValSize = MRI.getType(Dst).getSizeInBits() / 8; in legalizeVaArg() local
758 ValSize, std::max(Align, PtrSize))); in legalizeVaArg()
760 auto Size = MIRBuilder.buildConstant(IntPtrTy, alignTo(ValSize, PtrSize)); in legalizeVaArg()
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| /external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64LegalizerInfo.cpp | 913 uint64_t ValSize = MRI.getType(Dst).getSizeInBits() / 8; in legalizeVaArg() local
917 ValSize, std::max(Alignment, PtrAlign))); in legalizeVaArg()
919 auto Size = MIRBuilder.buildConstant(IntPtrTy, alignTo(ValSize, PtrAlign)); in legalizeVaArg()
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| /external/llvm-project/llvm/lib/Target/VE/ |
| D | VEISelLowering.cpp | 425 unsigned ValSize = VA.getValVT().getSizeInBits() / 8; in LowerFormalArguments() local
440 int FI = MF.getFrameInfo().CreateFixedObject(ValSize, Offset, true); in LowerFormalArguments()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.cpp | 2681 unsigned ValSize = ValTy.getSizeInBits(); in selectG_INSERT_VECTOR_ELT() local
2705 if (VecRB->getID() == AMDGPU::VGPRRegBankID && ValSize != 32) in selectG_INSERT_VECTOR_ELT()
2710 ValSize / 8); in selectG_INSERT_VECTOR_ELT()
2723 VecSize, ValSize, VecRB->getID() == AMDGPU::SGPRRegBankID); in selectG_INSERT_VECTOR_ELT()
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| D | AMDGPULegalizerInfo.cpp | 2387 const unsigned ValSize = ValTy.getSizeInBits(); in legalizeLoad() local
2398 if (WideMemSize == ValSize) { in legalizeLoad()
2410 if (ValSize > WideMemSize) in legalizeLoad()
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| /external/llvm-project/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 635 unsigned ValSize = VA.getValVT().getSizeInBits() / 8; in LowerFormalArguments_64() local
640 Offset += 8 - ValSize; in LowerFormalArguments_64()
641 int FI = MF.getFrameInfo().CreateFixedObject(ValSize, Offset, true); in LowerFormalArguments_64()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 644 unsigned ValSize = VA.getValVT().getSizeInBits() / 8; in LowerFormalArguments_64() local
649 Offset += 8 - ValSize; in LowerFormalArguments_64()
650 int FI = MF.getFrameInfo()->CreateFixedObject(ValSize, Offset, true); in LowerFormalArguments_64()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 637 unsigned ValSize = VA.getValVT().getSizeInBits() / 8; in LowerFormalArguments_64() local
642 Offset += 8 - ValSize; in LowerFormalArguments_64()
643 int FI = MF.getFrameInfo().CreateFixedObject(ValSize, Offset, true); in LowerFormalArguments_64()
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 7400 const unsigned ValSize = ValVT.getStoreSize(); in LowerFormalArguments_AIX() local
7401 assert((ValSize <= LocSize) && in LowerFormalArguments_AIX()
7405 if (LocSize > ValSize) in LowerFormalArguments_AIX()
7406 CurArgOffset += LocSize - ValSize; in LowerFormalArguments_AIX()
7411 int FI = MFI.CreateFixedObject(ValSize, CurArgOffset, IsImmutable); in LowerFormalArguments_AIX()
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