| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | FunctionLoweringInfo.cpp | 288 SmallVector<EVT, 4> ValueVTs; in set() local
289 ComputeValueVTs(*TLI, MF->getDataLayout(), PN.getType(), ValueVTs); in set()
290 for (EVT VT : ValueVTs) { in set()
372 SmallVector<EVT, 4> ValueVTs; in CreateRegs() local
373 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs); in CreateRegs()
376 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) { in CreateRegs()
377 EVT ValueVT = ValueVTs[Value]; in CreateRegs()
423 SmallVector<EVT, 1> ValueVTs; in ComputePHILiveOutRegInfo() local
424 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs); in ComputePHILiveOutRegInfo()
425 assert(ValueVTs.size() == 1 && in ComputePHILiveOutRegInfo()
[all …]
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| D | SelectionDAGBuilder.cpp | 776 : ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs), in RegsForValue()
782 ComputeValueVTs(TLI, DL, Ty, ValueVTs); in RegsForValue()
786 for (EVT ValueVT : ValueVTs) { in RegsForValue()
808 if (ValueVTs.empty()) in getCopyFromRegs()
814 SmallVector<SDValue, 4> Values(ValueVTs.size()); in getCopyFromRegs()
816 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) { in getCopyFromRegs()
818 EVT ValueVT = ValueVTs[Value]; in getCopyFromRegs()
887 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(ValueVTs), Values); in getCopyFromRegs()
900 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) { in getCopyToRegs()
973 assert(Regs.size() == RegVTs.size() && Regs.size() == ValueVTs.size() && in AddInlineAsmOperands()
[all …]
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| D | SelectionDAGBuilder.h | 835 SmallVector<EVT, 4> ValueVTs; member
872 ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end()); in append()
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | FunctionLoweringInfo.cpp | 299 SmallVector<EVT, 4> ValueVTs; in set() local
300 ComputeValueVTs(*TLI, MF->getDataLayout(), PN.getType(), ValueVTs); in set()
301 for (EVT VT : ValueVTs) { in set()
383 SmallVector<EVT, 4> ValueVTs; in CreateRegs() local
384 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs); in CreateRegs()
387 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) { in CreateRegs()
388 EVT ValueVT = ValueVTs[Value]; in CreateRegs()
434 SmallVector<EVT, 1> ValueVTs; in ComputePHILiveOutRegInfo() local
435 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs); in ComputePHILiveOutRegInfo()
436 assert(ValueVTs.size() == 1 && in ComputePHILiveOutRegInfo()
[all …]
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| D | SelectionDAGBuilder.cpp | 761 : ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs), in RegsForValue()
767 ComputeValueVTs(TLI, DL, Ty, ValueVTs); in RegsForValue()
771 for (EVT ValueVT : ValueVTs) { in RegsForValue()
793 if (ValueVTs.empty()) in getCopyFromRegs()
799 SmallVector<SDValue, 4> Values(ValueVTs.size()); in getCopyFromRegs()
801 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) { in getCopyFromRegs()
803 EVT ValueVT = ValueVTs[Value]; in getCopyFromRegs()
872 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(ValueVTs), Values); in getCopyFromRegs()
885 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) { in getCopyToRegs()
958 assert(Regs.size() == RegVTs.size() && Regs.size() == ValueVTs.size() && in AddInlineAsmOperands()
[all …]
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| D | SelectionDAGBuilder.h | 826 SmallVector<EVT, 4> ValueVTs; member
863 ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end()); in append()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FunctionLoweringInfo.cpp | 298 SmallVector<EVT, 4> ValueVTs; in set() local
299 ComputeValueVTs(*TLI, MF->getDataLayout(), PN->getType(), ValueVTs); in set()
300 for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) { in set()
301 EVT VT = ValueVTs[vti]; in set()
379 SmallVector<EVT, 4> ValueVTs; in CreateRegs() local
380 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs); in CreateRegs()
383 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) { in CreateRegs()
384 EVT ValueVT = ValueVTs[Value]; in CreateRegs()
426 SmallVector<EVT, 1> ValueVTs; in ComputePHILiveOutRegInfo() local
427 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs); in ComputePHILiveOutRegInfo()
[all …]
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| D | SelectionDAGBuilder.cpp | 620 : ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs) {} in RegsForValue()
624 ComputeValueVTs(TLI, DL, Ty, ValueVTs); in RegsForValue()
626 for (EVT ValueVT : ValueVTs) { in RegsForValue()
645 if (ValueVTs.empty()) in getCopyFromRegs()
651 SmallVector<SDValue, 4> Values(ValueVTs.size()); in getCopyFromRegs()
653 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) { in getCopyFromRegs()
655 EVT ValueVT = ValueVTs[Value]; in getCopyFromRegs()
738 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(ValueVTs), Values); in getCopyFromRegs()
755 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) { in getCopyToRegs()
756 EVT ValueVT = ValueVTs[Value]; in getCopyToRegs()
[all …]
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| D | SelectionDAGBuilder.h | 959 SmallVector<EVT, 4> ValueVTs; member
987 ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end()); in append()
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | Analysis.h | 69 SmallVectorImpl<EVT> &ValueVTs,
75 SmallVectorImpl<EVT> &ValueVTs,
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | Analysis.h | 73 SmallVectorImpl<EVT> &ValueVTs,
79 SmallVectorImpl<EVT> &ValueVTs,
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyMachineFunctionInfo.cpp | 30 Type *Ty, SmallVectorImpl<MVT> &ValueVTs) { in computeLegalValueVTs() argument
41 ValueVTs.push_back(RegisterVT); in computeLegalValueVTs()
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| D | WebAssemblyMachineFunctionInfo.h | 140 SmallVectorImpl<MVT> &ValueVTs);
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| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyMachineFunctionInfo.cpp | 31 Type *Ty, SmallVectorImpl<MVT> &ValueVTs) { in computeLegalValueVTs() argument
42 ValueVTs.push_back(RegisterVT); in computeLegalValueVTs()
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| D | WebAssemblyMachineFunctionInfo.h | 157 SmallVectorImpl<MVT> &ValueVTs);
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 84 Type *Ty, SmallVectorImpl<EVT> &ValueVTs, in ComputeValueVTs() argument
95 ComputeValueVTs(TLI, DL, *EI, ValueVTs, MemVTs, Offsets, in ComputeValueVTs()
104 ComputeValueVTs(TLI, DL, EltTy, ValueVTs, MemVTs, Offsets, in ComputeValueVTs()
112 ValueVTs.push_back(TLI.getValueType(DL, Ty)); in ComputeValueVTs()
120 Type *Ty, SmallVectorImpl<EVT> &ValueVTs, in ComputeValueVTs() argument
123 return ComputeValueVTs(TLI, DL, Ty, ValueVTs, /*MemVTs=*/nullptr, Offsets, in ComputeValueVTs()
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| D | TargetLoweringBase.cpp | 1470 SmallVector<EVT, 4> ValueVTs; in GetReturnInfo() local
1471 ComputeValueVTs(TLI, DL, ReturnType, ValueVTs); in GetReturnInfo()
1472 unsigned NumValues = ValueVTs.size(); in GetReturnInfo()
1476 EVT VT = ValueVTs[j]; in GetReturnInfo()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 85 Type *Ty, SmallVectorImpl<EVT> &ValueVTs, in ComputeValueVTs() argument
96 ComputeValueVTs(TLI, DL, *EI, ValueVTs, MemVTs, Offsets, in ComputeValueVTs()
105 ComputeValueVTs(TLI, DL, EltTy, ValueVTs, MemVTs, Offsets, in ComputeValueVTs()
113 ValueVTs.push_back(TLI.getValueType(DL, Ty)); in ComputeValueVTs()
121 Type *Ty, SmallVectorImpl<EVT> &ValueVTs, in ComputeValueVTs() argument
124 return ComputeValueVTs(TLI, DL, Ty, ValueVTs, /*MemVTs=*/nullptr, Offsets, in ComputeValueVTs()
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| D | TargetLoweringBase.cpp | 1654 SmallVector<EVT, 4> ValueVTs; in GetReturnInfo() local
1655 ComputeValueVTs(TLI, DL, ReturnType, ValueVTs); in GetReturnInfo()
1656 unsigned NumValues = ValueVTs.size(); in GetReturnInfo()
1660 EVT VT = ValueVTs[j]; in GetReturnInfo()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | Analysis.h | 73 SmallVectorImpl<EVT> &ValueVTs,
|
| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 86 Type *Ty, SmallVectorImpl<EVT> &ValueVTs, in ComputeValueVTs() argument
96 ComputeValueVTs(TLI, DL, *EI, ValueVTs, Offsets, in ComputeValueVTs()
105 ComputeValueVTs(TLI, DL, EltTy, ValueVTs, Offsets, in ComputeValueVTs()
113 ValueVTs.push_back(TLI.getValueType(DL, Ty)); in ComputeValueVTs()
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| D | TargetLoweringBase.cpp | 1572 SmallVector<EVT, 4> ValueVTs; in GetReturnInfo() local
1573 ComputeValueVTs(TLI, DL, ReturnType, ValueVTs); in GetReturnInfo()
1574 unsigned NumValues = ValueVTs.size(); in GetReturnInfo()
1578 EVT VT = ValueVTs[j]; in GetReturnInfo()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyAsmPrinter.cpp | 129 Type *Ty, SmallVectorImpl<MVT> &ValueVTs) { in ComputeLegalValueVTs() argument
140 ValueVTs.push_back(RegisterVT); in ComputeLegalValueVTs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 164 Type *Ty, SmallVectorImpl<EVT> &ValueVTs, in ComputePTXValueVTs() argument
172 ValueVTs.push_back(EVT(MVT::i64)); in ComputePTXValueVTs()
173 ValueVTs.push_back(EVT(MVT::i64)); in ComputePTXValueVTs()
188 ComputePTXValueVTs(TLI, DL, EI, ValueVTs, Offsets, in ComputePTXValueVTs()
212 ValueVTs.push_back(EltVT); in ComputePTXValueVTs()
217 ValueVTs.push_back(VT); in ComputePTXValueVTs()
235 unsigned Idx, uint32_t AccessSize, const SmallVectorImpl<EVT> &ValueVTs, in CanMergeParamLoadStoresStartingAt() argument
246 EVT EltVT = ValueVTs[Idx]; in CanMergeParamLoadStoresStartingAt()
259 if (Idx + NumElts > ValueVTs.size()) in CanMergeParamLoadStoresStartingAt()
268 if (ValueVTs[j] != EltVT) in CanMergeParamLoadStoresStartingAt()
[all …]
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| /external/llvm-project/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 149 Type *Ty, SmallVectorImpl<EVT> &ValueVTs, in ComputePTXValueVTs() argument
157 ValueVTs.push_back(EVT(MVT::i64)); in ComputePTXValueVTs()
158 ValueVTs.push_back(EVT(MVT::i64)); in ComputePTXValueVTs()
173 ComputePTXValueVTs(TLI, DL, EI, ValueVTs, Offsets, in ComputePTXValueVTs()
197 ValueVTs.push_back(EltVT); in ComputePTXValueVTs()
202 ValueVTs.push_back(VT); in ComputePTXValueVTs()
220 unsigned Idx, uint32_t AccessSize, const SmallVectorImpl<EVT> &ValueVTs, in CanMergeParamLoadStoresStartingAt() argument
230 EVT EltVT = ValueVTs[Idx]; in CanMergeParamLoadStoresStartingAt()
243 if (Idx + NumElts > ValueVTs.size()) in CanMergeParamLoadStoresStartingAt()
252 if (ValueVTs[j] != EltVT) in CanMergeParamLoadStoresStartingAt()
[all …]
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