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Searched refs:VirtRegMap (Results 1 – 25 of 119) sorted by relevance

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/external/llvm/lib/CodeGen/
DVirtRegMap.cpp50 char VirtRegMap::ID = 0;
52 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false)
54 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) { in runOnMachineFunction()
68 void VirtRegMap::grow() { in grow()
75 unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) { in createSpillSlot()
82 bool VirtRegMap::hasPreferredPhys(unsigned VirtReg) { in hasPreferredPhys()
91 bool VirtRegMap::hasKnownPreference(unsigned VirtReg) { in hasKnownPreference()
100 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { in assignVirt2StackSlot()
108 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) { in assignVirt2StackSlot()
118 void VirtRegMap::print(raw_ostream &OS, const Module*) const { in print()
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DRegAllocBase.h47 class VirtRegMap; variable
63 VirtRegMap *VRM;
80 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
DSplitKit.h37 class VirtRegMap; variable
80 const VirtRegMap &VRM;
150 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
240 VirtRegMap &VRM;
385 VirtRegMap&, MachineDominatorTree&,
DSpiller.h18 class VirtRegMap; variable
39 VirtRegMap &vrm);
DLiveDebugVariables.h32 class VirtRegMap; variable
59 void emitDebugValues(VirtRegMap *VRM);
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DVirtRegMap.cpp58 char VirtRegMap::ID = 0;
60 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false)
62 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) { in runOnMachineFunction()
76 void VirtRegMap::grow() { in grow()
83 void VirtRegMap::assignVirt2Phys(Register virtReg, MCPhysReg physReg) { in assignVirt2Phys()
93 unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) { in createSpillSlot()
101 bool VirtRegMap::hasPreferredPhys(Register VirtReg) { in hasPreferredPhys()
110 bool VirtRegMap::hasKnownPreference(Register VirtReg) { in hasKnownPreference()
119 int VirtRegMap::assignVirt2StackSlot(Register virtReg) { in assignVirt2StackSlot()
127 void VirtRegMap::assignVirt2StackSlot(Register virtReg, int SS) { in assignVirt2StackSlot()
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DRegAllocBase.h52 class VirtRegMap; variable
66 VirtRegMap *VRM = nullptr;
81 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
DSpiller.h17 class VirtRegMap; variable
39 VirtRegMap &vrm);
DLiveDebugVariables.h30 class VirtRegMap; variable
50 void emitDebugValues(VirtRegMap *VRM);
DSplitKit.h45 class VirtRegMap; variable
98 const VirtRegMap &VRM;
168 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
261 VirtRegMap &VRM;
446 VirtRegMap &vrm, MachineDominatorTree &mdt,
DAllocationOrder.h26 class VirtRegMap; variable
44 const VirtRegMap &VRM,
/external/llvm-project/llvm/lib/CodeGen/
DVirtRegMap.cpp58 char VirtRegMap::ID = 0;
60 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false)
62 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) { in runOnMachineFunction()
76 void VirtRegMap::grow() { in grow()
83 void VirtRegMap::assignVirt2Phys(Register virtReg, MCPhysReg physReg) { in assignVirt2Phys()
93 unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) { in createSpillSlot()
101 bool VirtRegMap::hasPreferredPhys(Register VirtReg) { in hasPreferredPhys()
110 bool VirtRegMap::hasKnownPreference(Register VirtReg) { in hasKnownPreference()
119 int VirtRegMap::assignVirt2StackSlot(Register virtReg) { in assignVirt2StackSlot()
127 void VirtRegMap::assignVirt2StackSlot(Register virtReg, int SS) { in assignVirt2StackSlot()
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DRegAllocBase.h52 class VirtRegMap; variable
66 VirtRegMap *VRM = nullptr;
81 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
DLiveDebugVariables.h30 class VirtRegMap; variable
50 void emitDebugValues(VirtRegMap *VRM);
DSplitKit.h46 class VirtRegMap; variable
99 const VirtRegMap &VRM;
169 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
262 VirtRegMap &VRM;
454 VirtRegMap &vrm, MachineDominatorTree &mdt,
DRegAllocPBQP.cpp165 void initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, Spiller &VRegSpiller);
169 MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM,
176 VirtRegMap &VRM,
182 VirtRegMap &VRM) const;
529 PBQPVirtRegAuxInfo(MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM, in PBQPVirtRegAuxInfo()
562 au.addRequired<VirtRegMap>(); in getAnalysisUsage()
563 au.addPreserved<VirtRegMap>(); in getAnalysisUsage()
590 void RegAllocPBQP::initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, in initializeGraph()
693 VirtRegMap &VRM, Spiller &VRegSpiller) { in spillVReg()
719 VirtRegMap &VRM, in mapPBQPToRegAlloc()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DVirtRegMap.h33 class VirtRegMap : public MachineFunctionPass {
70 VirtRegMap() in VirtRegMap() function
74 VirtRegMap(const VirtRegMap &) = delete;
75 VirtRegMap &operator=(const VirtRegMap &) = delete;
183 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
DCalcSpillWeights.h22 class VirtRegMap; variable
53 VirtRegMap *VRM;
61 VirtRegMap *vrm, const MachineLoopInfo &loops,
99 VirtRegMap *VRM,
/external/llvm-project/llvm/include/llvm/CodeGen/
DVirtRegMap.h32 class VirtRegMap : public MachineFunctionPass {
69 VirtRegMap() in VirtRegMap() function
73 VirtRegMap(const VirtRegMap &) = delete;
74 VirtRegMap &operator=(const VirtRegMap &) = delete;
182 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
DCalcSpillWeights.h22 class VirtRegMap; variable
49 const VirtRegMap &VRM;
55 const VirtRegMap &VRM, const MachineLoopInfo &Loops, in VirtRegAuxInfo()
DSpiller.h17 class VirtRegMap; variable
38 VirtRegMap &vrm);
/external/llvm/include/llvm/CodeGen/
DVirtRegMap.h32 class VirtRegMap : public MachineFunctionPass {
66 VirtRegMap(const VirtRegMap&) = delete;
67 void operator=(const VirtRegMap&) = delete;
71 VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG), in VirtRegMap() function
184 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
DCalcSpillWeights.h23 class VirtRegMap; variable
55 VirtRegMap *VRM;
63 VirtRegMap *vrm, const MachineLoopInfo &loops,
75 VirtRegMap *VRM,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIPreAllocateWWMRegs.cpp43 VirtRegMap *VRM;
60 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
77 INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
175 VRM = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIPreAllocateWWMRegs.cpp43 VirtRegMap *VRM;
60 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
77 INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
174 VRM = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()

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