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/external/arm-neon-tests/
Dref_vcvt.c56 #define TEST_VCVT_FP16(T1, T2, W1, W2, N) \ in exec_vcvt() argument
57 VECT_VAR(vector_res, T1, W1, N) = \ in exec_vcvt()
58 vcvt_##T2##W1##_##T2##W2(VECT_VAR(vector, T1, W2, N)); \ in exec_vcvt()
59 vst1q_##T2##W1(VECT_VAR(result, T1, W1, N), \ in exec_vcvt()
60 VECT_VAR(vector_res, T1, W1, N)); \ in exec_vcvt()
61 DUMP_FP(TEST_MSG, T1, W1, N, PRIx##W1); in exec_vcvt()
63 #define TEST_VCVT_2FP16(T1, T2, W1, W2, N) \ in exec_vcvt() argument
64 VECT_VAR(vector_res, T1, W1, N) = \ in exec_vcvt()
65 vcvt_##T2##W1##_##T2##W2(VECT_VAR(vector, T1, W2, N)); \ in exec_vcvt()
66 vst1_##T2##W1(VECT_VAR(result, T1, W1, N), \ in exec_vcvt()
[all …]
/external/boringssl/src/crypto/fipsmodule/sha/asm/
Dsha512-armv8.pl347 my ($W0,$W1)=("v16.4s","v17.4s");
378 ld1.32 {$W1},[$Ktbl],#16
386 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
389 ld1.32 {$W1},[$Ktbl],#16
396 add.i32 $W1,$W1,@MSG[1]
398 sha256h $ABCD,$EFGH,$W1
399 sha256h2 $EFGH,$abcd,$W1
401 ld1.32 {$W1},[$Ktbl]
408 add.i32 $W1,$W1,@MSG[3]
410 sha256h $ABCD,$EFGH,$W1
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Dsha1-armv8.pl248 my ($W0,$W1)=("v20.4s","v21.4s");
279 add.i32 $W1,@Kxx[0],@MSG[1]
290 sha1$f $ABCD,$E1,$W1
291 add.i32 $W1,@Kxx[$j],@MSG[3]
297 ($E0,$E1)=($E1,$E0); ($W0,$W1)=($W1,$W0);
302 sha1p $ABCD,$E1,$W1
303 add.i32 $W1,@Kxx[$j],@MSG[3]
309 sha1p $ABCD,$E1,$W1
Dsha256-armv4.pl606 my ($W0,$W1,$ABCD_SAVE,$EFGH_SAVE)=map("q$_",(12..15));
642 vld1.32 {$W1},[$Ktbl]!
650 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
653 vld1.32 {$W1},[$Ktbl]!
660 vadd.i32 $W1,$W1,@MSG[1]
662 sha256h $ABCD,$EFGH,$W1
663 sha256h2 $EFGH,$abcd,$W1
665 vld1.32 {$W1},[$Ktbl]
672 vadd.i32 $W1,$W1,@MSG[3]
674 sha256h $ABCD,$EFGH,$W1
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Dsha1-armv4-large.pl617 my ($W0,$W1,$ABCD_SAVE)=map("q$_",(12..14));
655 vadd.i32 $W1,@Kxx[0],@MSG[1]
666 sha1$f $ABCD,$E1,$W1
667 vadd.i32 $W1,@Kxx[$j],@MSG[3]
673 ($E0,$E1)=($E1,$E0); ($W0,$W1)=($W1,$W0);
678 sha1p $ABCD,$E1,$W1
679 vadd.i32 $W1,@Kxx[$j],@MSG[3]
685 sha1p $ABCD,$E1,$W1
/external/rust/crates/ring/crypto/fipsmodule/sha/asm/
Dsha512-armv8.pl347 my ($W0,$W1)=("v16.4s","v17.4s");
378 ld1.32 {$W1},[$Ktbl],#16
386 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
389 ld1.32 {$W1},[$Ktbl],#16
396 add.i32 $W1,$W1,@MSG[1]
398 sha256h $ABCD,$EFGH,$W1
399 sha256h2 $EFGH,$abcd,$W1
401 ld1.32 {$W1},[$Ktbl]
408 add.i32 $W1,$W1,@MSG[3]
410 sha256h $ABCD,$EFGH,$W1
[all …]
Dsha256-armv4.pl607 my ($W0,$W1,$ABCD_SAVE,$EFGH_SAVE)=map("q$_",(12..15));
643 vld1.32 {$W1},[$Ktbl]!
651 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
654 vld1.32 {$W1},[$Ktbl]!
661 vadd.i32 $W1,$W1,@MSG[1]
663 sha256h $ABCD,$EFGH,$W1
664 sha256h2 $EFGH,$abcd,$W1
666 vld1.32 {$W1},[$Ktbl]
673 vadd.i32 $W1,$W1,@MSG[3]
675 sha256h $ABCD,$EFGH,$W1
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/external/libxaac/decoder/
Dixheaacd_esbr_fft.c103 FLOAT32 W1, W2, W3, W4, W5, W6; in ixheaacd_real_synth_fft_p2() local
167 W1 = *(twiddles + j); in ixheaacd_real_synth_fft_p2()
192 tmp = (FLOAT32)(((FLOAT32)x1r * W1) + ((FLOAT32)x1i * W4)); in ixheaacd_real_synth_fft_p2()
193 x1i = (FLOAT32)(-((FLOAT32)x1r * W4) + (FLOAT32)x1i * W1); in ixheaacd_real_synth_fft_p2()
245 W1 = *(twiddles + j); in ixheaacd_real_synth_fft_p2()
270 tmp = (FLOAT32)(((FLOAT32)x1r * W1) + ((FLOAT32)x1i * W4)); in ixheaacd_real_synth_fft_p2()
271 x1i = (FLOAT32)(-((FLOAT32)x1r * W4) + (FLOAT32)x1i * W1); in ixheaacd_real_synth_fft_p2()
323 W1 = *(twiddles + j); in ixheaacd_real_synth_fft_p2()
348 tmp = (FLOAT32)(((FLOAT32)x1r * W1) + ((FLOAT32)x1i * W4)); in ixheaacd_real_synth_fft_p2()
349 x1i = (FLOAT32)(-((FLOAT32)x1r * W4) + (FLOAT32)x1i * W1); in ixheaacd_real_synth_fft_p2()
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/external/tensorflow/tensorflow/c/eager/
Dmnist_gradients_testutil.cc116 AbstractTensorHandle* W1 = inputs[1]; in MNISTForwardModel() local
122 TF_RETURN_IF_ERROR(ops::MatMul(ctx, {X, W1}, absl::MakeSpan(temp_outputs), in MNISTForwardModel()
154 AbstractTensorHandle* W1 = inputs[1]; in MatMulTransposeModel() local
156 TF_RETURN_IF_ERROR(ops::MatMul(ctx, {X, W1}, outputs, "matmul0", in MatMulTransposeModel()
167 AbstractTensorHandle* W1 = inputs[1]; in MNISTGradModel() local
173 tape->Watch(W1); // Watch W1. in MNISTGradModel()
177 TF_RETURN_IF_ERROR(ops::MatMul(tape_ctx.get(), {X, W1}, in MNISTGradModel()
204 /*sources=*/{W1, W2}, in MNISTGradModel()
Dmnist_gradients_test.cc158 AbstractTensorHandlePtr W1 = in TEST_P() local
179 {X.get(), W1.get(), W2.get(), y.get()}, absl::MakeSpan(outputs), in TEST_P()
235 AbstractTensorHandlePtr W1 = in TEST_P() local
256 {X.get(), W1.get(), W2.get(), y.get()}, absl::MakeSpan(outputs), in TEST_P()
315 AbstractTensorHandlePtr W1 = in TEST_P() local
323 Status s = RunModel(MatMulTransposeModel, ctx.get(), {X.get(), W1.get()}, in TEST_P()
373 AbstractTensorHandlePtr W1 = in TEST_P() local
408 {X.get(), W1.get(), W2.get(), y.get()}, absl::MakeSpan(outputs), in TEST_P()
530 AbstractTensorHandlePtr W1 = in TEST_P() local
552 weights.push_back(W1.get()); in TEST_P()
/external/libxaac/decoder/armv8/
Dixheaacd_calcmaxspectralline.s26 LSR W4, W1, #3
48 SUBS W7, W1, W6
51 MOV W1, V3.S[1]
53 ORR W4, W4, W1
/external/llvm/test/Transforms/BBVectorize/X86/
Dsimple.ll31 %W1 = fadd double %Y1, %Z1
33 %V1 = fadd double %W1, %Z1
35 %Q1 = fadd double %W1, %V1
37 %S1 = fadd double %W1, %Q1
49 ; CHECK: %W1 = fadd <2 x double> %Y1, %Z1
50 ; CHECK: %V1 = fadd <2 x double> %W1, %Z1
51 ; CHECK: %Q1 = fadd <2 x double> %W1, %V1
52 ; CHECK: %S1 = fadd <2 x double> %W1, %Q1
87 %W1 = fadd double %Y2, %Z1
/external/clang/test/CodeGenCXX/
Dmicrosoft-abi-rtti.cpp18 struct W1 : virtual V1 {}; struct
19 struct Y1 : W1, virtual V1 {} y1;
/external/llvm-project/clang/test/CodeGenCXX/
Dmicrosoft-abi-rtti.cpp18 struct W1 : virtual V1 {}; struct
19 struct Y1 : W1, virtual V1 {} y1;
/external/dng_sdk/source/
Ddng_color_space.cpp216 dng_vector_3 W1 = M * dng_vector_3 (1.0, 1.0, 1.0); in SetMatrixToPCS() local
219 real64 s0 = W2 [0] / W1 [0]; in SetMatrixToPCS()
220 real64 s1 = W2 [1] / W1 [1]; in SetMatrixToPCS()
221 real64 s2 = W2 [2] / W1 [2]; in SetMatrixToPCS()
/external/llvm-project/llvm/test/MC/AArch64/
Darmv8.4a-ldst-error.s9 STLURB W1, [XZR, #1]
11 STLURB W1, [X10, #-257]
Darmv8.4a-ldst.s12 STLURB W1, [X10]
13 STLURB W1, [X10, #-256]
/external/llvm/lib/Target/Hexagon/
DHexagonBitTracker.cpp297 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
298 assert(W0 == 64 && W1 == 32); in evaluate()
299 RegisterCell CW = RegisterCell(W0).insert(rc(1), BT::BitMask(0, W1-1)); in evaluate()
300 RegisterCell RC = eADD(eSXT(CW, W1), rc(2)); in evaluate()
626 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
630 RegisterCell RZ = RegisterCell(W0).fill(BX, W1, Zero) in evaluate()
631 .fill(W1+(W1-BX), W0, Zero); in evaluate()
632 RegisterCell BF1 = eXTR(rc(1), 0, BX), BF2 = eXTR(rc(1), BX, W1); in evaluate()
633 RegisterCell RC = eINS(eINS(RZ, BF1, 0), BF2, W1); in evaluate()
754 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonBitTracker.cpp371 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
372 assert(W0 == 64 && W1 == 32); in evaluate()
373 RegisterCell CW = RegisterCell(W0).insert(rc(1), BT::BitMask(0, W1-1)); in evaluate()
374 RegisterCell RC = eADD(eSXT(CW, W1), rc(2)); in evaluate()
700 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
704 RegisterCell RZ = RegisterCell(W0).fill(BX, W1, Zero) in evaluate()
705 .fill(W1+(W1-BX), W0, Zero); in evaluate()
706 RegisterCell BF1 = eXTR(rc(1), 0, BX), BF2 = eXTR(rc(1), BX, W1); in evaluate()
707 RegisterCell RC = eINS(eINS(RZ, BF1, 0), BF2, W1); in evaluate()
829 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
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/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonBitTracker.cpp369 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
370 assert(W0 == 64 && W1 == 32); in evaluate()
371 RegisterCell CW = RegisterCell(W0).insert(rc(1), BT::BitMask(0, W1-1)); in evaluate()
372 RegisterCell RC = eADD(eSXT(CW, W1), rc(2)); in evaluate()
698 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
702 RegisterCell RZ = RegisterCell(W0).fill(BX, W1, Zero) in evaluate()
703 .fill(W1+(W1-BX), W0, Zero); in evaluate()
704 RegisterCell BF1 = eXTR(rc(1), 0, BX), BF2 = eXTR(rc(1), BX, W1); in evaluate()
705 RegisterCell RC = eINS(eINS(RZ, BF1, 0), BF2, W1); in evaluate()
827 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
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/external/llvm/test/CodeGen/AArch64/
Darm64-dead-register-def-bug.ll6 ; E.g. %X1<def, dead> = MOVi64imm 2, %W1<imp-def>; %X1:GPR64, %W1:GPR32
/external/llvm-project/llvm/test/Transforms/SLPVectorizer/AArch64/
D64-bit-vector.ll16 ; CHECK-NEXT: [[W1:%.*]] = getelementptr inbounds float, float* [[W]], i64 1
29 ; NO_SLP-NEXT: [[W1:%.*]] = getelementptr inbounds float, float* [[W]], i64 1
31 ; NO_SLP-NEXT: store float [[ADD1]], float* [[W1]]
/external/llvm-project/llvm/test/CodeGen/Mips/msa/
Dfexuprl.ll15 ; CHECK: fexupl.w $w[[W1:[0-9]+]], $w[[W0]]
16 ; CHECK: st.w $w[[W1]], 0(${{[0-9]+}})
/external/bouncycastle/repackaged_platform/bcprov/src/main/java/com/android/internal/org/bouncycastle/util/
DStrings.java110 char W1 = ch; in toUTF8ByteArray() local
115 if (W1 > 0xDBFF) in toUTF8ByteArray()
119 int codePoint = (((W1 & 0x03FF) << 10) | (W2 & 0x03FF)) + 0x10000; in toUTF8ByteArray()
/external/bouncycastle/repackaged/bcprov/src/main/java/com/android/org/bouncycastle/util/
DStrings.java110 char W1 = ch; in toUTF8ByteArray() local
115 if (W1 > 0xDBFF) in toUTF8ByteArray()
119 int codePoint = (((W1 & 0x03FF) << 10) | (W2 & 0x03FF)) + 0x10000; in toUTF8ByteArray()

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