/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
D | llvm.amdgcn.wqm.ll | 9 ; GCN: [[WQM:%[0-9]+]]:vgpr_32 = WQM [[COPY]], implicit $exec 10 ; GCN: $vgpr0 = COPY [[WQM]] 21 ; GCN: [[WQM:%[0-9]+]]:vgpr_32 = WQM [[COPY]], implicit $exec 22 ; GCN: $vgpr0 = COPY [[WQM]] 37 ; GCN: [[WQM:%[0-9]+]]:vreg_64 = WQM [[REG_SEQUENCE]], implicit $exec 38 ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[WQM]].sub0 39 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[WQM]].sub1 64 ; GCN: [[WQM:%[0-9]+]]:vreg_96 = WQM [[REG_SEQUENCE]], implicit $exec 65 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[WQM]].sub0 66 ; GCN: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[WQM]].sub1 [all …]
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/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | llvm.amdgcn.wqm.vote.ll | 6 ;WAVE64: s_wqm_b64 [[WQM:[^,]+]], [[CMP]] 7 ;WAVE32: s_wqm_b32 [[WQM:[^,]+]], [[CMP]] 8 ;CHECK: v_cndmask_b32_e64 v0, 0, 1.0, [[WQM]] 40 ;WAVE64: s_wqm_b64 [[WQM:[^,]+]], [[CMP]] 41 ;WAVE64: s_and_b64 exec, exec, [[WQM]] 43 ;WAVE32: s_wqm_b32 [[WQM:[^,]+]], [[CMP]] 44 ;WAVE32: s_and_b32 exec_lo, exec_lo, [[WQM]]
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D | llvm.amdgcn.softwqm.ll | 3 ; Check that WQM is not triggered by the softwqm intrinsic alone. 37 ; Make sure the transition from WQM to Exact to softwqm does not trigger WQM. 57 ; Make sure the transition from WQM to Exact to softwqm does trigger WQM. 80 ; Make sure the transition from Exact to WWM then softwqm does not trigger WQM. 104 ; Check that softwqm on one case of branch does not trigger WQM for shader. 135 ; Check that softwqm on one case of branch is treated as WQM in WQM shader.
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D | wqm.ll | 4 ; Check that WQM isn't triggered by image load/store intrinsics. 15 ; Check that WQM is triggered by code calculating inputs to image samples and is disabled as soon a… 89 ; Check that WQM is re-enabled when required. 112 ; Check that WQM is triggered by the wqm intrinsic. 119 ; WQM was inserting an unecessary v_mov to self after the v_add. Make sure this 242 ; Make sure the transition from Exact to WWM then WQM works properly. 353 ; Check that enabling WQM anywhere enables WQM for the set.inactive source. 373 ; Check a case of one branch of an if-else requiring WQM, the other requiring 456 ; Check that branch conditions are properly marked as needing WQM... 476 ; The load that determines the branch (and should therefore be WQM) is [all …]
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D | llvm.amdgcn.ps.live.ll | 10 ; there is no WQM use and therefore llvm.amdgcn.ps.live is constant. However,
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D | wqm.mir | 147 # Check exit of WQM is still inserted correctly when SCC is live until block end.
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D | cf-stack-bug.ll | 31 ; non-WQM push instructions if we change this to 1, then we will need to
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/external/mesa3d/src/amd/compiler/ |
D | aco_insert_exec_mask.cpp | 36 WQM = 1 << 1, /* with control flow applied */ enumerator 196 exec_ctx.info[block_idx].block_needs |= WQM; in get_block_needs() 228 needs = pred_by_exec ? WQM : Unspecified; in get_block_needs() 234 needs = WQM; in get_block_needs() 244 } else if (preserve_wqm && info.block_needs & WQM) { in get_block_needs() 249 if (needs == WQM && instr->opcode == aco_opcode::p_phi) { in get_block_needs() 260 needs = WQM; in get_block_needs() 271 if (info.block_needs & WQM && !(block->kind & block_kind_top_level)) { in get_block_needs() 302 ever_again_needs & WQM) in calculate_wqm_needs() 393 if (ctx.info[0].block_needs == WQM) in add_coupling_code() [all …]
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/external/llvm/test/CodeGen/AMDGPU/ |
D | wqm.ll | 4 ; Check that WQM isn't triggered by image load/store intrinsics. 15 ; Check that WQM is triggered by image samples and left untouched for loads... 55 ; Check that WQM is re-enabled when required. 75 ; Check a case of one branch of an if-else requiring WQM, the other requiring 152 ; Check that branch conditions are properly marked as needing WQM... 173 ; The load that determines the branch (and should therefore be WQM) is 174 ; surrounded by stores that require disabled WQM. 277 ; Kill is performed in WQM mode so that uniform kill behaves correctly ... 316 ; ... but only if WQM is necessary.
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D | llvm.amdgcn.ps.live.ll | 7 ; there is no WQM use and therefore llvm.amdgcn.ps.live is constant. However,
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D | cf-stack-bug.ll | 31 ; non-WQM push instructions if we change this to 1, then we will need to
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/external/mesa3d/docs/relnotes/ |
D | 19.3.4.rst | 172 - aco: ensure predecessors' p_logical_end is in WQM when a p_phi is in 173 WQM 174 - aco: run p_wqm instructions in WQM
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D | 20.1.6.rst | 62 - aco: execute branch instructions in WQM if necessary
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D | 20.1.2.rst | 56 - aco: fix WQM handling in nested loops
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D | 12.0.6.rst | 118 - radeonsi: enable WQM in PS prolog when needed
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SIInstrFormats.td | 56 // Whether WQM _must_ be enabled for this instruction. 57 field bit WQM = 0; 59 // Whether WQM _must_ be disabled for this instruction. 174 let TSFlags{35} = WQM;
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D | SIDefines.h | 63 WQM = UINT64_C(1) << 35, enumerator
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIInstrFormats.td | 55 // Whether WQM _must_ be enabled for this instruction. 56 field bit WQM = 0; 58 // Whether WQM _must_ be disabled for this instruction. 165 let TSFlags{35} = WQM;
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D | SIDefines.h | 62 WQM = UINT64_C(1) << 35, enumerator
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D | SIInstrInfo.h | 527 return MI.getDesc().TSFlags & SIInstrFlags::WQM; in isWQM() 531 return get(Opcode).TSFlags & SIInstrFlags::WQM; in isWQM()
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/external/mesa3d/src/gallium/drivers/r600/sb/ |
D | sb_bc_fmt_def.inc | 65 BC_FIELD(CF_WORD1, WHOLE_QUAD_MODE, WQM, 30, 30) 78 BC_FIELD(CF_WORD1, WHOLE_QUAD_MODE, WQM, 30, 30) 110 BC_FIELD(CF_ALU_WORD1, WHOLE_QUAD_MODE, WQM, 30, 30) 121 BC_FIELD(CF_ALU_WORD1, WHOLE_QUAD_MODE, WQM, 30, 30) 178 BC_FIELD(CF_ALLOC_EXPORT_WORD1_BUF, WHOLE_QUAD_MODE, WQM, 30, 30) 214 BC_FIELD(CF_ALLOC_EXPORT_WORD1_SWIZ, WHOLE_QUAD_MODE, WQM, 30, 30)
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/external/llvm/lib/Target/AMDGPU/ |
D | SIDefines.h | 41 WQM = 1 << 22, enumerator
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D | SIInstrInfo.h | 336 return MI.getDesc().TSFlags & SIInstrFlags::WQM; in isWQM() 340 return get(Opcode).TSFlags & SIInstrFlags::WQM; in isWQM()
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D | SIInstrFormats.td | 44 field bits<1> WQM = 0; 80 let TSFlags{22} = WQM;
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
D | IntrinsicsAMDGPU.td | 1457 // the source value is computed as if the entire program were executed in WQM. 1463 // is computed as if the entire program were executed in WQM if any other 1464 // program code executes in WQM. 1489 // program ever uses WQM, then the instruction and the first source will be 1490 // computed in WQM.
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