Home
last modified time | relevance | path

Searched refs:WSP (Results 1 – 25 of 44) sorted by relevance

12

/external/python/cpython3/Lib/email/
D_header_value_parser.py83 WSP = set(' \t') variable
84 CFWS_LEADER = WSP | set('(')
86 ATOM_ENDS = SPECIALS | WSP
91 TOKEN_ENDS = TSPECIALS | WSP
93 ATTRIBUTE_ENDS = ASPECIALS | WSP
975 _wsp_splitter = re.compile(r'([{}]+)'.format(''.join(WSP))).split
1072 if text[0] in WSP:
1082 if value and value[0] not in WSP:
1112 if value[0] in WSP:
1218 if value[0] in WSP:
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td86 def WSP : AArch64Reg<31, "wsp">, DwarfRegNum<[31]>;
87 def WZR : AArch64Reg<31, "wzr">, DwarfRegAlias<WSP>;
121 def SP : AArch64Reg<31, "sp", [WSP]>, DwarfRegAlias<WSP>;
122 def XZR : AArch64Reg<31, "xzr", [WZR]>, DwarfRegAlias<WSP>;
139 // GPR register classes which exclude SP/WSP.
149 // GPR register classes which include SP/WSP.
150 def GPR32sp : RegisterClass<"AArch64", [i32], 32, (add GPR32common, WSP)> {
159 def GPR32sponly : RegisterClass<"AArch64", [i32], 32, (add WSP)>;
172 // GPR register classes which include WZR/XZR AND SP/WSP. This is not a
174 def GPR32all : RegisterClass<"AArch64", [i32], 32, (add GPR32common, WZR, WSP)>;
DAArch64RegisterInfo.cpp123 Reserved.set(AArch64::WSP); in getReservedRegs()
153 case AArch64::WSP: in isReservedReg()
DAArch64InstrInfo.cpp1904 if (DestReg == AArch64::WSP || SrcReg == AArch64::WSP) { in copyPhysReg()
2208 assert(SrcReg != AArch64::WSP); in storeRegToStackSlot()
2312 assert(DestReg != AArch64::WSP); in loadRegFromStackSlot()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td91 def WSP : AArch64Reg<31, "wsp">, DwarfRegNum<[31]>;
92 def WZR : AArch64Reg<31, "wzr">, DwarfRegAlias<WSP>;
126 def SP : AArch64Reg<31, "sp", [WSP]>, DwarfRegAlias<WSP>;
127 def XZR : AArch64Reg<31, "xzr", [WZR]>, DwarfRegAlias<WSP>;
150 // GPR register classes which exclude SP/WSP.
160 // GPR register classes which include SP/WSP.
161 def GPR32sp : RegisterClass<"AArch64", [i32], 32, (add GPR32common, WSP)> {
170 def GPR32sponly : RegisterClass<"AArch64", [i32], 32, (add WSP)>;
197 // GPR register classes which include WZR/XZR AND SP/WSP. This is not a
199 def GPR32all : RegisterClass<"AArch64", [i32], 32, (add GPR32common, WZR, WSP)>;
DAArch64SchedPredicates.td356 [CheckRegOperand<0, WSP>,
358 CheckRegOperand<1, WSP>,
DAArch64SpeculationHardening.cpp441 if (Reg == AArch64::SP || Reg == AArch64::WSP) in makeGPRSpeculationSafe()
DAArch64FalkorHWPFFix.cpp647 if (BaseReg == AArch64::SP || BaseReg == AArch64::WSP) in getLoadInfo()
DAArch64RegisterInfo.cpp308 markSuperRegs(Reserved, AArch64::WSP); in getReservedRegs()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td91 def WSP : AArch64Reg<31, "wsp">, DwarfRegNum<[31]>;
92 def WZR : AArch64Reg<31, "wzr">, DwarfRegAlias<WSP>;
126 def SP : AArch64Reg<31, "sp", [WSP]>, DwarfRegAlias<WSP>;
127 def XZR : AArch64Reg<31, "xzr", [WZR]>, DwarfRegAlias<WSP>;
147 // GPR register classes which exclude SP/WSP.
157 // GPR register classes which include SP/WSP.
158 def GPR32sp : RegisterClass<"AArch64", [i32], 32, (add GPR32common, WSP)> {
167 def GPR32sponly : RegisterClass<"AArch64", [i32], 32, (add WSP)>;
194 // GPR register classes which include WZR/XZR AND SP/WSP. This is not a
196 def GPR32all : RegisterClass<"AArch64", [i32], 32, (add GPR32common, WZR, WSP)>;
DAArch64SchedPredicates.td356 [CheckRegOperand<0, WSP>,
358 CheckRegOperand<1, WSP>,
DAArch64SpeculationHardening.cpp441 if (Reg == AArch64::SP || Reg == AArch64::WSP) in makeGPRSpeculationSafe()
DAArch64RegisterInfo.cpp202 markSuperRegs(Reserved, AArch64::WSP); in getReservedRegs()
DAArch64FalkorHWPFFix.cpp647 if (BaseReg == AArch64::SP || BaseReg == AArch64::WSP) in getLoadInfo()
/external/llvm-project/llvm/test/DebugInfo/AArch64/
Dcoalescing.ll29 ; CHECK-NEXT: DW_OP_breg31 WSP+12
Dframeindices.ll8 …piece 0x1, DW_OP_fbreg -47, DW_OP_piece 0xf, DW_OP_piece 0x1, DW_OP_breg31 WSP+42, DW_OP_piece 0x7)
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h63 case AArch64::SP: return AArch64::WSP; in getWRegFromXReg()
103 case AArch64::WSP: return AArch64::SP; in getXRegFromWReg()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h62 case AArch64::SP: return AArch64::WSP; in getWRegFromXReg()
102 case AArch64::WSP: return AArch64::SP; in getXRegFromWReg()
/external/llvm-project/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h62 case AArch64::SP: return AArch64::WSP; in getWRegFromXReg()
102 case AArch64::WSP: return AArch64::SP; in getXRegFromWReg()
/external/llvm-project/llvm/test/MC/AArch64/
Darm64-aliases.s5 ; ADD #0 to/from SP/WSP is a MOV
/external/llvm-project/llvm/test/DebugInfo/MIR/AArch64/
Dclobber-sp.mir8 # CHECK-NEXT: [0x0000000000000014, 0x0000000000000038): DW_OP_breg31 WSP+8
/external/llvm/test/MC/AArch64/
Darm64-aliases.s5 ; ADD #0 to/from SP/WSP is a MOV
/external/llvm/lib/Target/AArch64/InstPrinter/
DAArch64InstPrinter.cpp1109 ((Dest == AArch64::WSP || Src1 == AArch64::WSP) && in printArithExtend()
/external/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64InstPrinter.cpp1019 ((Dest == AArch64::WSP || Src1 == AArch64::WSP) && in printArithExtend()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64InstPrinter.cpp1005 ((Dest == AArch64::WSP || Src1 == AArch64::WSP) && in printArithExtend()

12