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Searched refs:WritebackReg (Results 1 – 4 of 4) sorted by relevance

/external/capstone/arch/ARM/
DARMDisassembler.c1250 unsigned WritebackReg = 0; in DecodeRegListOperand() local
1265 WritebackReg = MCOperand_getReg(MCInst_getOperand(Inst, 0)); in DecodeRegListOperand()
1276 if (NeedDisjointWriteback && WritebackReg == MCOperand_getReg(&(Inst->Operands[Inst->size-1]))) in DecodeRegListOperand()
1281 if (opcode == ARM_t2LDMIA_UPD && WritebackReg == ARM_SP) { in DecodeRegListOperand()
/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1213 unsigned WritebackReg = 0; in DecodeRegListOperand() local
1226 WritebackReg = Inst.getOperand(0).getReg(); in DecodeRegListOperand()
1237 if (NeedDisjointWriteback && WritebackReg == Inst.end()[-1].getReg()) in DecodeRegListOperand()
/external/llvm-project/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1547 unsigned WritebackReg = 0; in DecodeRegListOperand() local
1561 WritebackReg = Inst.getOperand(0).getReg(); in DecodeRegListOperand()
1580 if (NeedDisjointWriteback && WritebackReg == Inst.end()[-1].getReg()) in DecodeRegListOperand()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1526 unsigned WritebackReg = 0; in DecodeRegListOperand() local
1540 WritebackReg = Inst.getOperand(0).getReg(); in DecodeRegListOperand()
1559 if (NeedDisjointWriteback && WritebackReg == Inst.end()[-1].getReg()) in DecodeRegListOperand()