Home
last modified time | relevance | path

Searched refs:Writes (Results 1 – 25 of 253) sorted by relevance

1234567891011

/external/pcre/dist2/doc/
Dpcre2-config.txt27 --prefix Writes the directory prefix used in the PCRE2 installation
32 Writes the directory prefix used in the PCRE2 installation
36 --version Writes the version number of the installed PCRE2 libraries to
39 --libs8 Writes to the standard output the command line options re-
43 --libs16 Writes to the standard output the command line options re-
47 --libs32 Writes to the standard output the command line options re-
52 Writes to the standard output the command line options re-
56 --cflags Writes to the standard output the command line options re-
61 Writes to the standard output the command line options re-
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMScheduleA57.td79 list <SchedWriteRes> Writes = writes;
534 SchedVar<A57LMAddrPred1, A57LDMOpsListNoregin.Writes[0-1]>,
535 SchedVar<A57LMAddrPred2, A57LDMOpsListNoregin.Writes[0-3]>,
536 SchedVar<A57LMAddrPred3, A57LDMOpsListNoregin.Writes[0-5]>,
537 SchedVar<A57LMAddrPred4, A57LDMOpsListNoregin.Writes[0-7]>,
538 SchedVar<A57LMAddrPred5, A57LDMOpsListNoregin.Writes[0-9]>,
539 SchedVar<A57LMAddrPred6, A57LDMOpsListNoregin.Writes[0-11]>,
540 SchedVar<A57LMAddrPred7, A57LDMOpsListNoregin.Writes[0-13]>,
541 SchedVar<A57LMAddrPred8, A57LDMOpsListNoregin.Writes[0-15]>,
542 SchedVar<NoSchedPred, A57LDMOpsListNoregin.Writes[0-15]>
[all …]
/external/llvm-project/llvm/lib/Target/ARM/
DARMScheduleA57.td67 list <SchedWriteRes> Writes = writes;
531 SchedVar<A57LMAddrPred1, A57LDMOpsListNoregin.Writes[0-1]>,
532 SchedVar<A57LMAddrPred2, A57LDMOpsListNoregin.Writes[0-3]>,
533 SchedVar<A57LMAddrPred3, A57LDMOpsListNoregin.Writes[0-5]>,
534 SchedVar<A57LMAddrPred4, A57LDMOpsListNoregin.Writes[0-7]>,
535 SchedVar<A57LMAddrPred5, A57LDMOpsListNoregin.Writes[0-9]>,
536 SchedVar<A57LMAddrPred6, A57LDMOpsListNoregin.Writes[0-11]>,
537 SchedVar<A57LMAddrPred7, A57LDMOpsListNoregin.Writes[0-13]>,
538 SchedVar<A57LMAddrPred8, A57LDMOpsListNoregin.Writes[0-15]>,
539 SchedVar<NoSchedPred, A57LDMOpsListNoregin.Writes[0-15]>
[all …]
/external/llvm-project/polly/lib/Transform/
DMaximalStaticExpansion.cpp74 SmallPtrSetImpl<MemoryAccess *> &Writes,
171 const ScopArrayInfo *SAI, SmallPtrSetImpl<MemoryAccess *> &Writes, in isExpandable() argument
175 Writes.insert(S.getValueDef(SAI)); in isExpandable()
184 auto Writes = S.getPHIIncomings(SAI); in isExpandable() local
189 for (auto Write : Writes) { in isExpandable()
249 Writes.insert(MA); in isExpandable()
419 SmallPtrSet<MemoryAccess *, 4> Writes; in expandPhi() local
421 Writes.insert(MA); in expandPhi()
425 mapAccess(S, Writes, Dependences, ExpandedSAI, false); in expandPhi()
DDeLICM.cpp77 isl::union_map Writes, in computeReachingOverwrite() argument
80 return computeReachingWrite(Schedule, Writes, true, InclPrevWrite, in computeReachingOverwrite()
98 isl::union_set Writes, in computeScalarReachingOverwrite() argument
103 auto WritesMap = isl::union_map::from_domain(Writes); in computeScalarReachingOverwrite()
122 isl::set Writes, bool InclPrevWrite, in computeScalarReachingOverwrite() argument
125 isl::space DomSpace = Writes.get_space(); in computeScalarReachingOverwrite()
128 Schedule, isl::union_set(Writes), InclPrevWrite, InclOverwrite); in computeScalarReachingOverwrite()
632 auto Writes = getDomainFor(DefMA); in computeValueUses() local
635 auto WriteScatter = getScatterFor(Writes); in computeValueUses()
647 Writes.get_space().map_from_domain_and_range(ScatterSpace)); in computeValueUses()
/external/llvm-project/llvm/lib/MCA/HardwareUnits/
DRegisterFile.cpp348 SmallVectorImpl<WriteRef> &Writes) const { in collectWrites()
361 Writes.push_back(WR); in collectWrites()
367 Writes.push_back(WR); in collectWrites()
371 if (Writes.size() > 1) { in collectWrites()
372 sort(Writes, [](const WriteRef &Lhs, const WriteRef &Rhs) { in collectWrites()
375 auto It = std::unique(Writes.begin(), Writes.end()); in collectWrites()
376 Writes.resize(std::distance(Writes.begin(), It)); in collectWrites()
380 for (const WriteRef &WR : Writes) { in collectWrites()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/HardwareUnits/
DRegisterFile.cpp357 SmallVectorImpl<WriteRef> &Writes) const { in collectWrites()
370 Writes.push_back(WR); in collectWrites()
376 Writes.push_back(WR); in collectWrites()
380 if (Writes.size() > 1) { in collectWrites()
381 sort(Writes, [](const WriteRef &Lhs, const WriteRef &Rhs) { in collectWrites()
384 auto It = std::unique(Writes.begin(), Writes.end()); in collectWrites()
385 Writes.resize(std::distance(Writes.begin(), It)); in collectWrites()
389 for (const WriteRef &WR : Writes) { in collectWrites()
/external/llvm/utils/TableGen/
DCodeGenSchedule.cpp383 IdxVec &Writes, IdxVec &Reads) const { in findRWs() argument
387 findRWs(WriteDefs, Writes, false); in findRWs()
509 IdxVec Writes, Reads; in collectSchedClasses() local
511 findRWs(Inst->TheDef->getValueAsListOfDefs("SchedRW"), Writes, Reads); in collectSchedClasses()
516 unsigned SCIdx = addSchedClass(ItinDef, Writes, Reads, ProcIndices); in collectSchedClasses()
551 if (!SC.Writes.empty()) { in collectSchedClasses()
554 for (IdxIter WI = SC.Writes.begin(), WE = SC.Writes.end(); WI != WE; ++WI) in collectSchedClasses()
567 IdxVec Writes; in collectSchedClasses() local
570 Writes, Reads); in collectSchedClasses()
571 for (IdxIter WI = Writes.begin(), WE = Writes.end(); WI != WE; ++WI) in collectSchedClasses()
[all …]
DCodeGenSchedule.h132 IdxVec Writes; member
148 return ItinClassDef == IC && makeArrayRef(Writes) == W && in isKeyEqual()
370 void findRWs(const RecVec &RWDefs, IdxVec &Writes, IdxVec &Reads) const;
382 unsigned findSchedClassIdx(Record *ItinClassDef, ArrayRef<unsigned> Writes,
432 void collectRWResources(ArrayRef<unsigned> Writes, ArrayRef<unsigned> Reads,
/external/tensorflow/tensorflow/core/api_def/base_api/
Dapi_def_WriteSummary.pbtxt4 summary: "Writes a tensor summary."
6 Writes `tensor` at `step` with `tag` using summary `writer`.
Dapi_def_WriteGraphSummary.pbtxt4 summary: "Writes a graph summary."
6 Writes TensorFlow graph `tensor` at `step` using summary `writer`.
Dapi_def_WriteScalarSummary.pbtxt4 summary: "Writes a scalar summary."
6 Writes scalar `value` at `step` with `tag` using summary `writer`.
Dapi_def_WriteHistogramSummary.pbtxt4 summary: "Writes a histogram summary."
6 Writes histogram `values` at `step` with `tag` using summary `writer`.
Dapi_def_WriteRawProtoSummary.pbtxt4 summary: "Writes a serialized proto summary."
6 Writes `tensor`, a serialized proto at `step` using summary `writer`.
Dapi_def_WriteImageSummary.pbtxt4 summary: "Writes an image summary."
6 Writes image `tensor` at `step` with `tag` using summary `writer`.
Dapi_def_WriteAudioSummary.pbtxt4 summary: "Writes an audio summary."
6 Writes encoded audio summary `tensor` at `step` with `tag` using summary `writer`.
/external/llvm-project/llvm/utils/TableGen/
DCodeGenSchedule.cpp756 IdxVec &Writes, IdxVec &Reads) const { in findRWs() argument
760 findRWs(WriteDefs, Writes, false); in findRWs()
874 IdxVec Writes, Reads; in collectSchedClasses() local
876 findRWs(Inst->TheDef->getValueAsListOfDefs("SchedRW"), Writes, Reads); in collectSchedClasses()
879 unsigned SCIdx = addSchedClass(ItinDef, Writes, Reads, /*ProcIndices*/{0}); in collectSchedClasses()
920 if (!SC.Writes.empty()) { in collectSchedClasses()
924 for (IdxIter WI = SC.Writes.begin(), WE = SC.Writes.end(); WI != WE; in collectSchedClasses()
939 IdxVec Writes; in collectSchedClasses() local
942 Writes, Reads); in collectSchedClasses()
944 for (unsigned WIdx : Writes) in collectSchedClasses()
[all …]
/external/llvm-project/llvm/lib/MC/
DMCInstrAnalysis.cpp21 APInt &Writes) const { in clearsSuperRegisters()
22 Writes.clearAllBits(); in clearsSuperRegisters()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/MC/
DMCInstrAnalysis.cpp21 APInt &Writes) const { in clearsSuperRegisters()
22 Writes.clearAllBits(); in clearsSuperRegisters()
/external/llvm-project/llvm/lib/MCA/
DInstrBuilder.cpp307 ID.Writes.resize(TotalDefs + NumVariadicOps); in populateWrites()
324 WriteDescriptor &Write = ID.Writes[CurrentDef]; in populateWrites()
351 WriteDescriptor &Write = ID.Writes[Index]; in populateWrites()
378 WriteDescriptor &Write = ID.Writes[NumExplicitDefs + NumImplicitDefs]; in populateWrites()
410 WriteDescriptor &Write = ID.Writes[CurrentDef]; in populateWrites()
424 ID.Writes.resize(CurrentDef); in populateWrites()
679 if (D.Writes.empty()) in createInstruction()
684 APInt WriteMask(D.Writes.size(), 0); in createInstruction()
693 for (const WriteDescriptor &WD : D.Writes) { in createInstruction()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/
DInstrBuilder.cpp303 ID.Writes.resize(TotalDefs + NumVariadicOps); in populateWrites()
314 WriteDescriptor &Write = ID.Writes[CurrentDef]; in populateWrites()
341 WriteDescriptor &Write = ID.Writes[Index]; in populateWrites()
368 WriteDescriptor &Write = ID.Writes[NumExplicitDefs + NumImplicitDefs]; in populateWrites()
400 WriteDescriptor &Write = ID.Writes[CurrentDef]; in populateWrites()
414 ID.Writes.resize(CurrentDef); in populateWrites()
676 if (D.Writes.empty()) in createInstruction()
681 APInt WriteMask(D.Writes.size(), 0); in createInstruction()
690 for (const WriteDescriptor &WD : D.Writes) { in createInstruction()
/external/llvm-project/llvm/lib/Transforms/Scalar/
DLoopDataPrefetch.cpp235 bool Writes; member
241 : LSCEVAddRec(L), InsertPt(nullptr), Writes(false), MemI(nullptr) { in Prefetch()
254 Writes = isa<StoreInst>(I); in addInstruction()
265 Writes = true; in addInstruction()
404 ConstantInt::get(I32, P.Writes), in runOnLoop()
/external/llvm-project/llvm/lib/CodeGen/
DCalcSpillWeights.cpp234 bool Reads, Writes; in weightCalcHelper() local
235 std::tie(Reads, Writes) = MI->readsWritesVirtualRegister(LI.reg()); in weightCalcHelper()
236 Weight = LiveIntervals::getSpillWeight(Writes, Reads, &MBFI, *MI); in weightCalcHelper()
239 if (Writes && IsExiting && LIS.isLiveOutOfMBB(LI, MBB)) in weightCalcHelper()
/external/llvm-project/llvm/include/llvm/MCA/
DInstruction.h277 void setDependentWrites(unsigned Writes) { in setDependentWrites() argument
278 DependentWrites = Writes; in setDependentWrites()
279 IsReady = !Writes; in setDependentWrites()
349 SmallVector<WriteDescriptor, 4> Writes; // Implicit writes are at the end. member
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MCA/
DInstruction.h277 void setDependentWrites(unsigned Writes) { in setDependentWrites() argument
278 DependentWrites = Writes; in setDependentWrites()
279 IsReady = !Writes; in setDependentWrites()
349 SmallVector<WriteDescriptor, 4> Writes; // Implicit writes are at the end. member

1234567891011