Searched refs:XER (Results 1 – 16 of 16) sorted by relevance
13 * XER
235 def XER: SPR<1, "xer">, DwarfRegNum<[76]>;237 // Carry bit. In the architecture this is really bit 0 of the XER register241 let Aliases = [XER];382 def CARRYRC : RegisterClass<"PPC", [i32], 32, (add CARRY, XER)> {
1043 let Defs = [XER] in1047 let Defs = [XER, CR0] in1070 let Defs = [XER] in1074 let Defs = [XER, CR0] in1095 let Defs = [CARRY, XER] in1099 let Defs = [CARRY, XER, CR0] in1119 let Defs = [XER] in1123 let Defs = [XER, CR0] in1144 let Defs = [CARRY, XER] in1148 let Defs = [CARRY, XER, CR0] in
587 Move to CR from XER Extended (mcrxrx):
264 def XER: SPR<1, "xer">, DwarfRegNum<[76]>;266 // Carry bit. In the architecture this is really bit 0 of the XER register270 let Aliases = [XER];413 def CARRYRC : RegisterClass<"PPC", [i32], 32, (add CARRY, XER)> {
1209 let Defs = [XER] in1213 let Defs = [XER, CR0] in1236 let Defs = [XER] in1240 let Defs = [XER, CR0] in1261 let Defs = [CARRY, XER] in1265 let Defs = [CARRY, XER, CR0] in1285 let Defs = [XER] in1289 let Defs = [XER, CR0] in1310 let Defs = [CARRY, XER] in1314 let Defs = [CARRY, XER, CR0] in
92 XER = 9 variable in ASN1_Codecs
216 // Carry bit. In the architecture this is really bit 0 of the XER register
158 // Move to CR from XER Extended X-form p119
29 XER = 9,1161 { PPC::CARRY, PPC::XER },1406 PPC::CARRY, PPC::XER, 1820 { 76U, PPC::XER },2108 { 76U, PPC::XER },2327 { PPC::XER, 76U },2880 { PPC::XER, 76U },
2644 static const MCPhysReg ImplicitList2[] = { PPC::XER, 0 };2645 static const MCPhysReg ImplicitList3[] = { PPC::XER, PPC::CR0, 0 };2648 static const MCPhysReg ImplicitList6[] = { PPC::CARRY, PPC::XER, 0 };2649 static const MCPhysReg ImplicitList7[] = { PPC::CARRY, PPC::XER, PPC::CR0, 0 };
3999 case PPC::XER: OpKind = MCK_CARRYRC; break;
12723 ,"US","XER","Cleona","Cleona","PA","--3-----","RQ","9307",,,
40079 ,"FR","XER","Port-Sainte-Marie","Port-Sainte-Marie","41","1----6--","RQ","1101",,,""