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Searched refs:XMM0 (Results 1 – 25 of 120) sorted by relevance

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/external/mesa3d/src/mesa/x86/
Dsse_xform3.S78 MOVAPS ( REGOFF(0, EDX), XMM0 ) /* m0 | m1 | m2 | m3 */
93 MULPS ( XMM0, XMM4 ) /* m3*ox | m2*ox | m1*ox | m0*ox */
151 MOVLPS ( S(0), XMM0 )
152 MOVLPS ( XMM0, D(0) )
153 MOVSS ( S(2), XMM0 )
154 MOVSS ( XMM0, D(2) )
202 XORPS( XMM0, XMM0 ) /* clean the working register */
215 MOVLPS ( S(0), XMM0 ) /* - | - | s1 | s0 */
216 MULPS ( XMM1, XMM0 ) /* - | - | s1*m5 | s0*m0 */
217 ADDPS ( XMM2, XMM0 ) /* - | - | +m13 | +m12 */
[all …]
Dsse_normal.S80 MOVSS ( ARG_SCALE, XMM0 ) /* scale */
81 SHUFPS ( CONST(0x0), XMM0, XMM0 ) /* scale | scale */
82 MULPS ( XMM0, XMM1 ) /* m5*scale | m0*scale */
83 MULSS ( M(10), XMM0 ) /* m10*scale */
92 MULSS ( XMM0, XMM2 ) /* uz*m10*scale */
139 MOVSS ( M(0), XMM0 ) /* m0 */
141 UNPCKLPS( XMM1, XMM0 ) /* m4 | m0 */
146 MULPS ( XMM4, XMM0 ) /* m4*scale | m0*scale */
165 MULPS ( XMM0, XMM3 ) /* ux*m4 | ux*m0 */
232 MOVSS( M(0), XMM0 ) /* m0 */
[all …]
Dsse_xform4.S79 MOVSS( SRC(0), XMM0 ) /* ox */
80 SHUFPS( CONST(0x0), XMM0, XMM0 ) /* ox | ox | ox | ox */
81 MULPS( XMM4, XMM0 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
95 ADDPS( XMM1, XMM0 ) /* ox*m3+oy*m7 | ... */
96 ADDPS( XMM2, XMM0 ) /* ox*m3+oy*m7+oz*m11 | ... */
97 ADDPS( XMM3, XMM0 ) /* ox*m3+oy*m7+oz*m11+ow*m15 | ... */
98 MOVAPS( XMM0, DST(0) ) /* ->D(3) | ->D(2) | ->D(1) | ->D(0) */
144 MOVAPS( MAT(0), XMM0 ) /* m3 | m2 | m1 | m0 */
153 MULPS( XMM0, XMM4 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
218 MOVAPS( REGIND(ESI), XMM0 )
[all …]
Dsse_xform2.S77 MOVAPS( M(0), XMM0 ) /* m3 | m2 | m1 | m0 */
85 MULPS( XMM0, XMM3 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
190 XORPS( XMM0, XMM0 ) /* clean the working register */
201 MOVLPS ( S(0), XMM0 ) /* - | - | oy | ox */
202 MULPS ( XMM1, XMM0 ) /* - | - | oy*m5 | ox*m0 */
203 ADDPS ( XMM2, XMM0 ) /* - | - | +m13 | +m12 */
204 MOVLPS ( XMM0, D(0) ) /* -> D(1) | -> D(0) */
256 XORPS ( XMM0, XMM0 ) /* 0 | 0 | 0 | 0 */
264 MOVSS( XMM0, D(3) ) /* ->D(3) */
311 MOVLPS( M(0), XMM0 ) /* m1 | m0 */
[all …]
Dsse_xform1.S78 MOVAPS( M(0), XMM0 ) /* m3 | m2 | m1 | m0 */
85 MULPS( XMM0, XMM2 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
187 MOVSS( M(0), XMM0 ) /* m0 */
195 MULSS( XMM0, XMM4 ) /* ox*m0 */
248 XORPS( XMM0, XMM0 ) /* 0 | 0 | 0 | 0 */
259 MOVSS( XMM0, D(1) )
260 MOVSS( XMM0, D(3) )
306 MOVLPS( M(0), XMM0 ) /* m1 | m0 */
313 MULPS( XMM0, XMM2 ) /* - | - | ox*m1 | ox*m0 */
361 MOVSS( M(0), XMM0 ) /* m0 */
[all …]
Dcommon_x86_asm.S167 XORPS ( XMM0, XMM0 )
196 XORPS ( XMM0, XMM0 )
205 DIVPS ( XMM0, XMM1 )
/external/llvm/test/CodeGen/X86/
Davx-cast.ll12 ; AVX-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
23 ; AVX-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
36 ; AVX1-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
43 ; AVX2-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
57 ; AVX-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
67 ; AVX-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
77 ; AVX-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
Dbreak-false-dep.ll188 ;SSE: xorps [[XMM0:%xmm[0-9]+]], [[XMM0]]
189 ;SSE-NEXT: cvtsi2sdl {{.*}}, [[XMM0]]
190 ;SSE-NEXT: mulsd {{.*}}, [[XMM0]]
191 ;SSE-NEXT: mulsd {{.*}}, [[XMM0]]
192 ;SSE-NEXT: mulsd {{.*}}, [[XMM0]]
193 ;SSE-NEXT: movsd [[XMM0]],
195 ;AVX: vxorps [[XMM0:%xmm[0-9]+]], [[XMM0]]
196 ;AVX-NEXT: vcvtsi2sdl {{.*}}, [[XMM0]], [[XMM0]]
197 ;AVX-NEXT: vmulsd {{.*}}, [[XMM0]], [[XMM0]]
198 ;AVX-NEXT: vmulsd {{.*}}, [[XMM0]], [[XMM0]]
[all …]
Dvector-trunc-math.ll39 ; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
47 ; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
110 ; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
154 ; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
162 ; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
387 ; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
430 ; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
438 ; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
506 ; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
549 ; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
[all …]
Dx86-upgrade-avx2-vbroadcast.ll11 ; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
Dvector-shuffle-combining-avx2.ll89 ; CHECK-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
113 ; CHECK-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
139 ; CHECK-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
161 ; CHECK-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
185 ; CHECK-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
196 ; CHECK-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def>
Davx512-trunc.ll58 ; KNL-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
136 ; KNL-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
214 ; KNL-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
290 ; KNL-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
367 ; KNL-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
Davx2-conversions.ll9 ; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
21 ; CHECK-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
Davx512-cvt.ll93 ; SKX-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
307 ; KNL-NEXT: ## kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
309 ; KNL-NEXT: ## kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
334 ; KNL-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
593 ; KNL-NEXT: ## kill: %XMM0<def> %XMM0<kill> %YMM0<def>
634 ; KNL-NEXT: ## kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
636 ; KNL-NEXT: ## kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrKL.td20 let Uses = [XMM0, EAX], Defs = [EFLAGS] in {
23 [(int_x86_loadiwkey XMM0, VR128:$src1, VR128:$src2, EAX)]>, T8XS,
27 let Uses = [XMM0], Defs = [XMM0, XMM1, XMM2, XMM4, XMM5, XMM6, EFLAGS] in {
33 let Uses = [XMM0, XMM1], Defs = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, EFLAGS] in {
69 let Uses = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7],
70 Defs = [EFLAGS, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7],
DX86CallingConv.td46 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7];
52 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
233 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3
237 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
265 // case they use XMM0, otherwise it is the same as the common X86 calling
268 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
275 // The X86-32 fastcc returns 1, 2, or 3 FP values in XMM0-2 if the target has
279 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
280 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
293 // Vector types are returned in XMM0,XMM1,XMMM2 and XMM3.
[all …]
/external/llvm/lib/Target/X86/
DX86CallingConv.td53 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3
57 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
84 // case they use XMM0, otherwise it is the same as the common X86 calling
87 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
94 // The X86-32 fastcc returns 1, 2, or 3 FP values in XMM0-2 if the target has
98 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
99 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
112 // Vector types are returned in XMM0,XMM1,XMMM2 and XMM3.
114 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
140 // Vector types are returned in XMM0,XMM1,XMMM2 and XMM3.
[all …]
/external/llvm-project/llvm/test/CodeGen/X86/
Dpr31143.ll4 ; CHECK: movss {{.*}}, %[[XMM0:xmm[0-9]+]]
6 ; CHECK: roundss $9, %[[XMM0]], %[[XMM1]]
31 ; CHECK: movsd {{.*}}, %[[XMM0:xmm[0-9]+]]
33 ; CHECK: roundsd $9, %[[XMM0]], %[[XMM1]]
Ddebuginfo-locations-dce.ll65 ; [0x0000000000000009, 0x0000000000000012): DW_OP_reg17 XMM0)
70 ; CHECK-NEXT: {{.*}}DW_OP_reg17 XMM0
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86CallingConv.td46 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7];
52 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
233 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3
237 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
265 // case they use XMM0, otherwise it is the same as the common X86 calling
268 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
275 // The X86-32 fastcc returns 1, 2, or 3 FP values in XMM0-2 if the target has
279 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
280 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
293 // Vector types are returned in XMM0,XMM1,XMMM2 and XMM3.
[all …]
/external/llvm-project/llvm/unittests/tools/llvm-exegesis/X86/
DTargetTest.cpp196 setRegTo(X86::XMM0, APInt(128, "11112222333344445555666677778888", 16)), in TEST_F()
202 IsMovValueFromStack(X86::MOVDQUrm, X86::XMM0), in TEST_F()
208 setRegTo(X86::XMM0, APInt(128, "11112222333344445555666677778888", 16)), in TEST_F()
214 IsMovValueFromStack(X86::VMOVDQUrm, X86::XMM0), in TEST_F()
220 setRegTo(X86::XMM0, APInt(128, "11112222333344445555666677778888", 16)), in TEST_F()
226 IsMovValueFromStack(X86::VMOVDQU32Z128rm, X86::XMM0), in TEST_F()
/external/llvm/lib/Target/X86/AsmParser/
DX86Operand.h242 return isMem64() && isMemIndexReg(X86::XMM0, X86::XMM15); in isMem64_RC128()
245 return isMem128() && isMemIndexReg(X86::XMM0, X86::XMM15); in isMem128_RC128()
251 return isMem256() && isMemIndexReg(X86::XMM0, X86::XMM15); in isMem256_RC128()
258 return isMem64() && isMemIndexReg(X86::XMM0, X86::XMM31); in isMem64_RC128X()
261 return isMem128() && isMemIndexReg(X86::XMM0, X86::XMM31); in isMem128_RC128X()
267 return isMem256() && isMemIndexReg(X86::XMM0, X86::XMM31); in isMem256_RC128X()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/
DX86Operand.h321 return isMem64() && isMemIndexReg(X86::XMM0, X86::XMM15); in isMem64_RC128()
324 return isMem128() && isMemIndexReg(X86::XMM0, X86::XMM15); in isMem128_RC128()
330 return isMem256() && isMemIndexReg(X86::XMM0, X86::XMM15); in isMem256_RC128()
337 return isMem64() && isMemIndexReg(X86::XMM0, X86::XMM31); in isMem64_RC128X()
340 return isMem128() && isMemIndexReg(X86::XMM0, X86::XMM31); in isMem128_RC128X()
346 return isMem256() && isMemIndexReg(X86::XMM0, X86::XMM31); in isMem256_RC128X()
/external/llvm-project/llvm/lib/Target/X86/AsmParser/
DX86Operand.h329 return isMem64() && isMemIndexReg(X86::XMM0, X86::XMM15); in isMem64_RC128()
332 return isMem128() && isMemIndexReg(X86::XMM0, X86::XMM15); in isMem128_RC128()
338 return isMem256() && isMemIndexReg(X86::XMM0, X86::XMM15); in isMem256_RC128()
345 return isMem64() && isMemIndexReg(X86::XMM0, X86::XMM31); in isMem64_RC128X()
348 return isMem128() && isMemIndexReg(X86::XMM0, X86::XMM31); in isMem128_RC128X()
354 return isMem256() && isMemIndexReg(X86::XMM0, X86::XMM31); in isMem256_RC128X()
/external/llvm-project/llvm/test/TableGen/
DTargetInstrSpec.td47 def XMM0: Register<"xmm0">;
65 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,

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