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Searched refs:XMM1 (Results 1 – 25 of 78) sorted by relevance

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/external/mesa3d/src/mesa/x86/
Dsse_normal.S77 MOVSS ( M(0), XMM1 ) /* m0 */
79 UNPCKLPS( XMM2, XMM1 ) /* m5 | m0 */
82 MULPS ( XMM0, XMM1 ) /* m5*scale | m0*scale */
88 MULPS ( XMM1, XMM2 ) /* uy*m5*scale | ux*m0*scale */
140 MOVSS ( M(4), XMM1 ) /* m4 */
141 UNPCKLPS( XMM1, XMM0 ) /* m4 | m0 */
147 MOVSS ( M(1), XMM1 ) /* m1 */
149 UNPCKLPS( XMM2, XMM1 ) /* m5 | m1 */
150 MULPS ( XMM4, XMM1 ) /* m5*scale | m1*scale */
168 MULPS ( XMM1, XMM4 ) /* uy*m5 | uy*m1 */
[all …]
Dsse_xform2.S78 MOVAPS( M(4), XMM1 ) /* m7 | m6 | m5 | m4 */
88 MULPS( XMM1, XMM4 ) /* oy*m7 | oy*m6 | oy*m5 | oy*m4 */
193 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
195 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
202 MULPS ( XMM1, XMM0 ) /* - | - | oy*m5 | ox*m0 */
252 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
254 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
261 MULPS( XMM1, XMM4 ) /* oy*m5 | ox*m0 */
312 MOVLPS( M(4), XMM1 ) /* m5 | m4 */
323 MULPS( XMM1, XMM4 ) /* oy*m5 | oy*m4 */
[all …]
Dsse_xform3.S79 MOVAPS ( REGOFF(16, EDX), XMM1 ) /* m4 | m5 | m6 | m7 */
94 MULPS ( XMM1, XMM5 ) /* m7*oy | m6*oy | m5*oy | m4*oy */
205 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
207 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
216 MULPS ( XMM1, XMM0 ) /* - | - | s1*m5 | s0*m0 */
270 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
272 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
281 MULPS ( XMM1, XMM0 ) /* oy*m5 | ox*m0 */
344 MOVLPS( M(4), XMM1 ) /* m5 | m4 */
354 MULPS ( XMM1, XMM4 ) /* oy*m5 | oy*m4 */
[all …]
Dsse_xform1.S79 MOVAPS( M(12), XMM1 ) /* m15 | m14 | m13 | m12 */
86 ADDPS( XMM1, XMM2 ) /* + | + | + | + */
188 MOVSS( M(12), XMM1 ) /* m12 */
196 ADDSS( XMM1, XMM4 ) /* ox*m0+m12 */
249 MOVSS( M(0), XMM1 ) /* m0 */
255 MULSS( XMM1, XMM3 ) /* ox*m0 */
307 MOVLPS( M(12), XMM1 ) /* m13 | m12 */
314 ADDPS( XMM1, XMM2 ) /* - | - | ox*m1+m13 | ox*m0+m12 */
362 MOVSS( M(12), XMM1 ) /* m12 */
369 ADDSS( XMM1, XMM3 ) /* ox*m0+m12 */
[all …]
Dsse_xform4.S83 MOVSS( SRC(1), XMM1 ) /* oy */
84 SHUFPS( CONST(0x0), XMM1, XMM1 ) /* oy | oy | oy | oy */
85 MULPS( XMM5, XMM1 ) /* oy*m7 | oy*m6 | oy*m5 | oy*m4 */
95 ADDPS( XMM1, XMM0 ) /* ox*m3+oy*m7 | ... */
145 MOVAPS( MAT(4), XMM1 ) /* m7 | m6 | m5 | m4 */
157 MULPS( XMM1, XMM5 ) /* oy*m7 | oy*m6 | oy*m5 | oy*m4 */
Dcommon_x86_asm.S203 MOVUPS ( REGIND( ESP ), XMM1 )
205 DIVPS ( XMM0, XMM1 )
/external/llvm-project/llvm/test/CodeGen/X86/
Dpr31143.ll5 ; CHECK: xorps %[[XMM1:xmm[0-9]+]], %[[XMM1]]
6 ; CHECK: roundss $9, %[[XMM0]], %[[XMM1]]
32 ; CHECK: xorps %[[XMM1:xmm[0-9]+]], %[[XMM1]]
33 ; CHECK: roundsd $9, %[[XMM0]], %[[XMM1]]
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrKL.td27 let Uses = [XMM0], Defs = [XMM0, XMM1, XMM2, XMM4, XMM5, XMM6, EFLAGS] in {
33 let Uses = [XMM0, XMM1], Defs = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, EFLAGS] in {
69 let Uses = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7],
70 Defs = [EFLAGS, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7],
DX86CallingConv.td46 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7];
52 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
233 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3
237 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
239 // 256-bit vectors are returned in YMM0 and XMM1, when they fit. YMM2 and YMM3
268 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
279 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
280 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
293 // Vector types are returned in XMM0,XMM1,XMMM2 and XMM3.
295 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
[all …]
/external/llvm/lib/Target/X86/
DX86CallingConv.td53 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3
57 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
59 // 256-bit vectors are returned in YMM0 and XMM1, when they fit. YMM2 and YMM3
87 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
98 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
99 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
112 // Vector types are returned in XMM0,XMM1,XMMM2 and XMM3.
114 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
140 // Vector types are returned in XMM0,XMM1,XMMM2 and XMM3.
142 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86CallingConv.td46 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7];
52 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
233 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3
237 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
239 // 256-bit vectors are returned in YMM0 and XMM1, when they fit. YMM2 and YMM3
268 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
279 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
280 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
293 // Vector types are returned in XMM0,XMM1,XMMM2 and XMM3.
295 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
[all …]
/external/llvm-project/llvm/test/tools/llvm-exegesis/X86/lbr/Inputs/
Dmov_add.att2 # LLVM-EXEGESIS-DEFREG XMM1 42
/external/llvm-project/llvm/test/TableGen/
DTargetInstrSpec.td48 def XMM1: Register<"xmm1">;
65 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DSlice.td41 def XMM1: Register<"xmm1">;
58 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
Dcast.td47 def XMM1: Register<"xmm1">;
64 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DMultiPat.td51 def XMM1: Register<"xmm1">;
68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
/external/llvm/test/TableGen/
Dcast.td47 def XMM1: Register<"xmm1">;
64 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DSlice.td41 def XMM1: Register<"xmm1">;
58 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DTargetInstrSpec.td48 def XMM1: Register<"xmm1">;
65 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DMultiPat.td51 def XMM1: Register<"xmm1">;
68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
/external/llvm/test/MC/X86/
Dintel-syntax-encoding.s65 cmpltps XMM2, XMM1
/external/capstone/suite/MC/X86/
Dintel-syntax-encoding.s.cs26 0x0f,0xc2,0xd1,0x01 = cmpltps XMM2, XMM1
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenCallingConv.inc232 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
438 X86::XMM0, X86::XMM1, X86::XMM2
603 X86::XMM0, X86::XMM1, X86::XMM2
880 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
904 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
1173 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
1237 X86::XMM0, X86::XMM1, X86::XMM2
1550 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
1688 X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6
1952 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
[all …]
/external/llvm-project/llvm/test/MC/X86/
Dintel-syntax-encoding.s82 cmpltps XMM2, XMM1
/external/llvm/test/CodeGen/X86/
Davx512bw-mov.ll163 ; CHECK-NEXT: ## kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
193 ; CHECK-NEXT: ## kill: %XMM1<def> %XMM1<kill> %ZMM1<def>

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