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Searched refs:XMM2 (Results 1 – 25 of 64) sorted by relevance

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/external/mesa3d/src/mesa/x86/
Dsse_normal.S78 MOVSS ( M(5), XMM2 ) /* m5 */
79 UNPCKLPS( XMM2, XMM1 ) /* m5 | m0 */
87 MOVLPS ( S(0), XMM2 ) /* uy | ux */
88 MULPS ( XMM1, XMM2 ) /* uy*m5*scale | ux*m0*scale */
89 MOVLPS ( XMM2, D(0) ) /* ->D(1) | D(0) */
91 MOVSS ( S(2), XMM2 ) /* uz */
92 MULSS ( XMM0, XMM2 ) /* uz*m10*scale */
93 MOVSS ( XMM2, D(2) ) /* ->D(2) */
148 MOVSS ( M(5), XMM2 ) /* m5 */
149 UNPCKLPS( XMM2, XMM1 ) /* m5 | m1 */
[all …]
Dsse_xform1.S83 MOVSS( S(0), XMM2 ) /* ox */
84 SHUFPS( CONST(0x0), XMM2, XMM2 ) /* ox | ox | ox | ox */
85 MULPS( XMM0, XMM2 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
86 ADDPS( XMM1, XMM2 ) /* + | + | + | + */
87 MOVUPS( XMM2, D(0) )
189 MOVSS( M(13), XMM2 ) /* m13 */
199 MOVSS( XMM2, D(1) )
250 MOVSS( M(14), XMM2 ) /* m14 */
257 MOVSS( XMM2, D(2) ) /* m14->D(2) */
311 MOVSS( S(0), XMM2 ) /* ox */
[all …]
Dsse_xform3.S80 MOVAPS ( REGOFF(32, EDX), XMM2 ) /* m8 | m9 | m10 | m11 */
95 MULPS ( XMM2, XMM6 ) /* m11*oz | m10*oz | m9*oz | m8*oz */
206 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
207 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
208 MOVLPS ( M(12), XMM2 ) /* - | - | m13 | m12 */
217 ADDPS ( XMM2, XMM0 ) /* - | - | +m13 | +m12 */
271 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
272 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
273 MOVLPS ( M(8), XMM2 ) /* - | - | m9 | m8 */
284 MULPS ( XMM2, XMM5 ) /* oz*m9 | oz*m8 */
[all …]
Dsse_xform2.S79 MOVAPS( M(12), XMM2 ) /* m15 | m14 | m13 | m12 */
91 ADDPS( XMM2, XMM3 )
194 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
195 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
196 MOVLPS ( M(12), XMM2 ) /* - | - | m13 | m12 */
203 ADDPS ( XMM2, XMM0 ) /* - | - | +m13 | +m12 */
253 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
254 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */
313 MOVLPS( M(12), XMM2 ) /* m13 | m12 */
326 ADDPS( XMM2, XMM3 )
[all …]
Dsse_xform4.S87 MOVSS( SRC(2), XMM2 ) /* oz */
88 SHUFPS( CONST(0x0), XMM2, XMM2 ) /* oz | oz | oz | oz */
89 MULPS( XMM6, XMM2 ) /* oz*m11 | oz*m10 | oz*m9 | oz*m8 */
96 ADDPS( XMM2, XMM0 ) /* ox*m3+oy*m7+oz*m11 | ... */
146 MOVAPS( MAT(8), XMM2 ) /* m11 | m10 | m9 | m8 */
161 MULPS( XMM2, XMM6 ) /* oz*m11 | oz*m10 | oz*m9 | oz*m8 */
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrKL.td27 let Uses = [XMM0], Defs = [XMM0, XMM1, XMM2, XMM4, XMM5, XMM6, EFLAGS] in {
33 let Uses = [XMM0, XMM1], Defs = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, EFLAGS] in {
69 let Uses = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7],
70 Defs = [EFLAGS, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7],
DX86CallingConv.td46 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7];
52 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
233 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3
237 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
268 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
279 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
280 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
295 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
323 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
364 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>,
[all …]
/external/llvm/lib/Target/X86/
DX86CallingConv.td53 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3
57 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
87 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
98 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
99 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
114 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
142 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
206 // XMM0, XMM1, XMM2 and XMM3 can be used to return FP values.
207 CCIfType<[f32], CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>,
208 CCIfType<[f64], CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>,
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86CallingConv.td46 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7];
52 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
233 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3
237 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
268 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
279 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
280 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>,
295 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
323 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>,
361 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>,
[all …]
DX86CallingConv.cpp80 static const MCPhysReg RegListXMM[] = {X86::XMM0, X86::XMM1, X86::XMM2, in CC_X86_VectorCallGetSSEs()
/external/llvm/test/CodeGen/X86/
Dstackmap-liveness.ll47 ; LiveOut Entry 1: %YMM2 (16 bytes) --> %XMM2
94 ; LiveOut Entry 5: %YMM2 (16 bytes) --> %XMM2
126 ; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
163 ; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
Dbreak-false-dep.ll78 ; SSE: xorps [[XMM2:%xmm[0-9]+]]
79 ; SSE: , [[XMM2]]
80 ; SSE: cvtsi2ssl %{{.*}}, [[XMM2]]
Dghc-cc64.ll17 @f2 = external global float ; assigned to register: XMM2
/external/llvm-project/llvm/test/TableGen/
DTargetInstrSpec.td49 def XMM2: Register<"xmm2">;
65 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DSlice.td42 def XMM2: Register<"xmm2">;
58 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
Dcast.td48 def XMM2: Register<"xmm2">;
64 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DMultiPat.td52 def XMM2: Register<"xmm2">;
68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
/external/llvm/test/TableGen/
Dcast.td48 def XMM2: Register<"xmm2">;
64 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DSlice.td42 def XMM2: Register<"xmm2">;
58 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DTargetInstrSpec.td49 def XMM2: Register<"xmm2">;
65 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
DMultiPat.td52 def XMM2: Register<"xmm2">;
68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
/external/llvm/test/MC/X86/
Dintel-syntax-encoding.s65 cmpltps XMM2, XMM1
/external/capstone/suite/MC/X86/
Dintel-syntax-encoding.s.cs26 0x0f,0xc2,0xd1,0x01 = cmpltps XMM2, XMM1
/external/llvm-project/llvm/test/MC/X86/
Dintel-syntax-encoding.s82 cmpltps XMM2, XMM1
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenCallingConv.inc232 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
438 X86::XMM0, X86::XMM1, X86::XMM2
603 X86::XMM0, X86::XMM1, X86::XMM2
880 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
904 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
1173 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
1237 X86::XMM0, X86::XMM1, X86::XMM2
1550 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
1688 X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6
1952 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,…
[all …]

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