Searched refs:XN (Results 1 – 25 of 91) sorted by relevance
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| /external/cldr/tools/java/org/unicode/cldr/util/data/ |
| D | tlds-alpha-by-domain.txt | 1335 XN--11B4C3D
1336 XN--1CK2E1B
1337 XN--1QQW23A
1338 XN--2SCRJ9C
1339 XN--30RR7Y
1340 XN--3BST00M
1341 XN--3DS443G
1342 XN--3E0B707E
1343 XN--3HCRJ9C
1344 XN--3OQ18VL8PN36A
[all …]
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| /external/clang/test/Modules/Inputs/declare-use/ |
| D | module.map | 40 use XN
68 module XN {
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| /external/llvm-project/clang/test/Modules/Inputs/declare-use/ |
| D | module.map | 40 use XN
68 module XN {
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| /external/arm-trusted-firmware/docs/security_advisories/ |
| D | security-advisory-tfv-3.rst | 57 translation tables. The EL3 translation regime uses a single ``XN`` bit to
60 The ``xlat_tables`` library only handles the ``XN`` bit, which maps to ``UXN``
68 of the ``XN``, ``UXN`` or ``PXN`` bits in the translation tables. See the
76 - AArch32 configurations are unaffected. Here the ``XN`` bit controls execution
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| /external/arm-trusted-firmware/lib/xlat_tables_v2/aarch32/ |
| D | xlat_tables_arch.c | 82 return UPPER_ATTRS(XN) | UPPER_ATTRS(PXN); in xlat_arch_regime_get_xn_desc()
85 return UPPER_ATTRS(XN); in xlat_arch_regime_get_xn_desc()
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| /external/llvm/utils/lit/lit/ |
| D | ProgressBar.py | 112 self.XN = curses.tigetflag('xenl')
233 if not self.term.XN:
272 if not self.term.XN:
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| /external/llvm-project/llvm/utils/lit/lit/ |
| D | ProgressBar.py | 112 self.XN = curses.tigetflag('xenl')
233 if not self.term.XN:
275 if not self.term.XN:
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| /external/arm-trusted-firmware/lib/xlat_tables/aarch32/ |
| D | xlat_tables.c | 51 return UPPER_ATTRS(XN); in xlat_arch_get_xn_desc()
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| /external/arm-trusted-firmware/lib/xlat_tables/aarch64/ |
| D | xlat_tables.c | 111 return UPPER_ATTRS(XN); in xlat_arch_get_xn_desc()
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| /external/arm-trusted-firmware/include/lib/xlat_tables/ |
| D | xlat_tables_defs.h | 52 #define XN (ULL(1) << 2) macro
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| /external/python/cryptography/vectors/cryptography_vectors/x509/PKITS_data/smime/ |
| D | SignedInvaliddeltaCRLTest4.eml | 26 XN/kxEe8mxh/nl2jWEundquIwtjnMKXV4hU7ynC+Vg7taRu6Mu558dvGbBzkJ9LY
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| D | SignedValiddeltaCRLTest2.eml | 26 XN/kxEe8mxh/nl2jWEundquIwtjnMKXV4hU7ynC+Vg7taRu6Mu558dvGbBzkJ9LY
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| D | SignedInvaliddeltaCRLTest3.eml | 26 XN/kxEe8mxh/nl2jWEundquIwtjnMKXV4hU7ynC+Vg7taRu6Mu558dvGbBzkJ9LY
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| D | SignedValiddeltaCRLTest5.eml | 26 XN/kxEe8mxh/nl2jWEundquIwtjnMKXV4hU7ynC+Vg7taRu6Mu558dvGbBzkJ9LY
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| D | SignedValiddeltaCRLTest7.eml | 26 XN/kxEe8mxh/nl2jWEundquIwtjnMKXV4hU7ynC+Vg7taRu6Mu558dvGbBzkJ9LY
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| D | SignedInvaliddeltaCRLTest6.eml | 26 XN/kxEe8mxh/nl2jWEundquIwtjnMKXV4hU7ynC+Vg7taRu6Mu558dvGbBzkJ9LY
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| /external/arm-trusted-firmware/lib/xlat_tables_v2/aarch64/ |
| D | xlat_tables_arch.c | 156 return UPPER_ATTRS(XN); in xlat_arch_regime_get_xn_desc()
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| /external/python/cpython3/Lib/test/ |
| D | test_binop.py | 410 class XN: class
432 e, sn, xn = SupEq(), SN(), XN()
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| /external/e2fsprogs/debian/upstream/ |
| D | signing-key.asc | 149 NGgjrxA9Zw+HXmvtdRRWBU8l/L4DPNRW4SeBkNJUAa6SfJ9fMhflzV0lx+AlP/XN
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| /external/llvm-project/llvm/test/Transforms/InstCombine/ |
| D | max-of-nots.ll | 139 ; CHECK-NEXT: [[XN:%.*]] = xor i8 [[X:%.*]], -1
142 ; CHECK-NEXT: [[CMPXZ:%.*]] = icmp ult i8 [[XN]], [[ZN]]
143 ; CHECK-NEXT: [[MINXZ:%.*]] = select i1 [[CMPXZ]], i8 [[XN]], i8 [[ZN]]
146 ; CHECK-NEXT: call void @use8(i8 [[XN]])
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| /external/llvm/lib/Target/Mips/ |
| D | MipsScheduleP5600.td | 271 def : InstRW<[P5600WriteMSAShortLogic], (instregex "^(AND|OR|[XN]OR)_V$")>;
272 def : InstRW<[P5600WriteMSAShortLogic], (instregex "^(AND|OR|[XN]OR)I_B$")>;
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| /external/arm-trusted-firmware/lib/xlat_tables_v2/ |
| D | xlat_tables_utils.c | 69 printf(((desc & UPPER_ATTRS(XN)) != 0ULL) ? "-XN" : "-EXEC"); in xlat_desc_print()
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| /external/subsampling-scale-image-view/ |
| D | README.md | 117 * Swiss Road by Ludovic Fremondiere, via [unsplash.com](https://unsplash.com/photos/3XN-BNRDUyY)
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| /external/starlark-go/ |
| D | go.sum | 6 github.com/chzyer/readline v0.0.0-20180603132655-2972be24d48e h1:fY5BOSpyZCqRo5OhCuC+XN+r/bBCmeuuJt…
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsScheduleP5600.td | 350 def : InstRW<[P5600WriteMSAShortLogic], (instregex "^(AND|OR|[XN]OR)_V$")>;
351 def : InstRW<[P5600WriteMSAShortLogic], (instregex "^(AND|OR|[XN]OR)I_B$")>;
353 (instregex "^(AND|OR|[XN]OR)_V_[DHW]_PSEUDO$")>;
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