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1 /*
2  * Copyright (c) 2019-2020, Xilinx, Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 /* Versal power management enums and defines */
8 
9 #ifndef PM_DEFS_H
10 #define PM_DEFS_H
11 
12 #include "pm_node.h"
13 
14 /*********************************************************************
15  * Macro definitions
16  ********************************************************************/
17 
18 /* State arguments of the self suspend */
19 #define PM_STATE_CPU_IDLE	0x0U
20 #define PM_STATE_SUSPEND_TO_RAM	0xFU
21 
22 #define MAX_LATENCY		(~0U)
23 #define MAX_QOS			100U
24 
25 /* Processor core device IDs */
26 #define APU_DEVID(IDX)	NODEID(XPM_NODECLASS_DEVICE, XPM_NODESUBCL_DEV_CORE, \
27 			       XPM_NODETYPE_DEV_CORE_APU, (IDX))
28 
29 #define XPM_DEVID_ACPU_0	APU_DEVID(XPM_NODEIDX_DEV_ACPU_0)
30 #define XPM_DEVID_ACPU_1	APU_DEVID(XPM_NODEIDX_DEV_ACPU_1)
31 
32 #define PERIPH_DEVID(IDX)	NODEID(XPM_NODECLASS_DEVICE, \
33 				       XPM_NODESUBCL_DEV_PERIPH, \
34 				       XPM_NODETYPE_DEV_PERIPH, (IDX))
35 
36 #define PM_GET_CALLBACK_DATA		0xa01
37 #define PM_GET_TRUSTZONE_VERSION	0xa03
38 
39 /* PM API Versions */
40 #define PM_API_BASE_VERSION		1U
41 
42 #define PM_API_QUERY_DATA_VERSION	2U
43 
44 /* PM API ids */
45 #define PM_GET_API_VERSION		1U
46 #define PM_GET_DEVICE_STATUS		3U
47 #define PM_GET_OP_CHARACTERISTIC	4U
48 #define PM_REGISTER_NOTIFIER		5U
49 #define PM_REQ_SUSPEND			6U
50 #define PM_SELF_SUSPEND			7U
51 #define PM_FORCE_POWERDOWN		8U
52 #define PM_ABORT_SUSPEND		9U
53 #define PM_REQ_WAKEUP			10U
54 #define PM_SET_WAKEUP_SOURCE		11U
55 #define PM_SYSTEM_SHUTDOWN		12U
56 #define PM_REQUEST_DEVICE		13U
57 #define PM_RELEASE_DEVICE		14U
58 #define PM_SET_REQUIREMENT		15U
59 #define PM_SET_MAX_LATENCY		16U
60 #define PM_RESET_ASSERT			17U
61 #define PM_RESET_GET_STATUS		18U
62 #define PM_INIT_FINALIZE		21U
63 #define PM_GET_CHIPID			24U
64 #define	PM_PINCTRL_REQUEST		28U
65 #define	PM_PINCTRL_RELEASE		29U
66 #define	PM_PINCTRL_GET_FUNCTION		30U
67 #define	PM_PINCTRL_SET_FUNCTION		31U
68 #define	PM_PINCTRL_CONFIG_PARAM_GET	32U
69 #define	PM_PINCTRL_CONFIG_PARAM_SET	33U
70 #define PM_IOCTL			34U
71 #define PM_QUERY_DATA			35U
72 #define PM_CLOCK_ENABLE			36U
73 #define PM_CLOCK_DISABLE		37U
74 #define PM_CLOCK_GETSTATE		38U
75 #define PM_CLOCK_SETDIVIDER		39U
76 #define PM_CLOCK_GETDIVIDER		40U
77 #define PM_CLOCK_SETRATE		41U
78 #define PM_CLOCK_GETRATE		42U
79 #define PM_CLOCK_SETPARENT		43U
80 #define PM_CLOCK_GETPARENT		44U
81 #define PM_PLL_SET_PARAMETER		48U
82 #define PM_PLL_GET_PARAMETER		49U
83 #define PM_PLL_SET_MODE			50U
84 #define PM_PLL_GET_MODE			51U
85 #define PM_FEATURE_CHECK		63U
86 
87 /* Loader API ids */
88 #define PM_LOAD_PDI			0x701U
89 
90 /* IOCTL IDs for clock driver */
91 #define IOCTL_SET_PLL_FRAC_MODE		8
92 #define	IOCTL_GET_PLL_FRAC_MODE		9
93 #define	IOCTL_SET_PLL_FRAC_DATA		10
94 #define	IOCTL_GET_PLL_FRAC_DATA		11
95 
96 /* Parameter ID for PLL IOCTLs */
97 /* Fractional data portion for PLL */
98 #define PM_PLL_PARAM_DATA	2
99 
100 /* System shutdown macros */
101 #define	XPM_SHUTDOWN_TYPE_SHUTDOWN	0U
102 #define	XPM_SHUTDOWN_TYPE_RESET		1U
103 #define	XPM_SHUTDOWN_TYPE_SETSCOPE_ONLY	2U
104 
105 #define	XPM_SHUTDOWN_SUBTYPE_RST_SUBSYSTEM	0U
106 #define	XPM_SHUTDOWN_SUBTYPE_RST_PS_ONLY	1U
107 #define	XPM_SHUTDOWN_SUBTYPE_RST_SYSTEM		2U
108 
109 /*********************************************************************
110  * Enum definitions
111  ********************************************************************/
112 
113 enum pm_abort_reason {
114 	ABORT_REASON_WKUP_EVENT = 100,
115 	ABORT_REASON_PU_BUSY,
116 	ABORT_REASON_NO_PWRDN,
117 	ABORT_REASON_UNKNOWN,
118 };
119 
120 enum pm_opchar_type {
121 	PM_OPCHAR_TYPE_POWER = 1,
122 	PM_OPCHAR_TYPE_TEMP,
123 	PM_OPCHAR_TYPE_LATENCY,
124 };
125 
126 /**
127  * Subsystem IDs
128  */
129 typedef enum {
130 	XPM_SUBSYSID_PMC,
131 	XPM_SUBSYSID_PSM,
132 	XPM_SUBSYSID_APU,
133 	XPM_SUBSYSID_RPU0_LOCK,
134 	XPM_SUBSYSID_RPU0_0,
135 	XPM_SUBSYSID_RPU0_1,
136 	XPM_SUBSYSID_DDR0,
137 	XPM_SUBSYSID_ME,
138 	XPM_SUBSYSID_PL,
139 	XPM_SUBSYSID_MAX,
140 } XPm_SubsystemId;
141 
142 /**
143  * @PM_RET_SUCCESS:		success
144  * @PM_RET_ERROR_ARGS:		illegal arguments provided (deprecated)
145  * @PM_RET_ERROR_NOTSUPPORTED:	feature not supported  (deprecated)
146  * @PM_RET_ERROR_NOFEATURE:	feature is not available
147  * @PM_RET_ERROR_INTERNAL:	internal error
148  * @PM_RET_ERROR_CONFLICT:	conflict
149  * @PM_RET_ERROR_ACCESS:	access rights violation
150  * @PM_RET_ERROR_INVALID_NODE:	invalid node
151  * @PM_RET_ERROR_DOUBLE_REQ:	duplicate request for same node
152  * @PM_RET_ERROR_ABORT_SUSPEND:	suspend procedure has been aborted
153  * @PM_RET_ERROR_TIMEOUT:	timeout in communication with PMU
154  * @PM_RET_ERROR_NODE_USED:	node is already in use
155  */
156 enum pm_ret_status {
157 	PM_RET_SUCCESS,
158 	PM_RET_ERROR_ARGS = 1,
159 	PM_RET_ERROR_NOTSUPPORTED = 4,
160 	PM_RET_ERROR_NOFEATURE = 19,
161 	PM_RET_ERROR_INTERNAL = 2000,
162 	PM_RET_ERROR_CONFLICT = 2001,
163 	PM_RET_ERROR_ACCESS = 2002,
164 	PM_RET_ERROR_INVALID_NODE = 2003,
165 	PM_RET_ERROR_DOUBLE_REQ = 2004,
166 	PM_RET_ERROR_ABORT_SUSPEND = 2005,
167 	PM_RET_ERROR_TIMEOUT = 2006,
168 	PM_RET_ERROR_NODE_USED = 2007
169 };
170 
171 /**
172  * Qids
173  */
174 enum pm_query_id {
175 	XPM_QID_INVALID,
176 	XPM_QID_CLOCK_GET_NAME,
177 	XPM_QID_CLOCK_GET_TOPOLOGY,
178 	XPM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS,
179 	XPM_QID_CLOCK_GET_MUXSOURCES,
180 	XPM_QID_CLOCK_GET_ATTRIBUTES,
181 	XPM_QID_PINCTRL_GET_NUM_PINS,
182 	XPM_QID_PINCTRL_GET_NUM_FUNCTIONS,
183 	XPM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS,
184 	XPM_QID_PINCTRL_GET_FUNCTION_NAME,
185 	XPM_QID_PINCTRL_GET_FUNCTION_GROUPS,
186 	XPM_QID_PINCTRL_GET_PIN_GROUPS,
187 	XPM_QID_CLOCK_GET_NUM_CLOCKS,
188 	XPM_QID_CLOCK_GET_MAX_DIVISOR,
189 	XPM_QID_PLD_GET_PARENT,
190 };
191 #endif /* PM_DEFS_H */
192