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Searched refs:XVT (Results 1 – 16 of 16) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h564 bool shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
567 if (XVT.isVector()) in shouldTransformSignedTruncationCheck()
578 return VTIsOk(XVT) && VTIsOk(KeptBitsVT); in shouldTransformSignedTruncationCheck()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h705 bool shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
708 if (XVT.isVector()) in shouldTransformSignedTruncationCheck()
719 return VTIsOk(XVT) && VTIsOk(KeptBitsVT); in shouldTransformSignedTruncationCheck()
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.h1017 shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
1020 if (XVT.isVector()) in shouldTransformSignedTruncationCheck()
1031 return VTIsOk(XVT) && VTIsOk(KeptBitsVT); in shouldTransformSignedTruncationCheck()
DX86ISelDAGToDAG.cpp3557 MVT XVT = X.getSimpleValueType(); in matchBitExtract() local
3593 if (XVT != MVT::i32) { in matchBitExtract()
3594 Control = CurDAG->getNode(ISD::ANY_EXTEND, DL, XVT, Control); in matchBitExtract()
3599 SDValue Extract = CurDAG->getNode(X86ISD::BEXTR, DL, XVT, X, Control); in matchBitExtract()
3602 if (XVT != NVT) { in matchBitExtract()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.h905 shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
908 if (XVT.isVector()) in shouldTransformSignedTruncationCheck()
919 return VTIsOk(XVT) && VTIsOk(KeptBitsVT); in shouldTransformSignedTruncationCheck()
DX86ISelDAGToDAG.cpp3459 MVT XVT = X.getSimpleValueType(); in matchBitExtract() local
3494 if (XVT != MVT::i32) { in matchBitExtract()
3495 Control = CurDAG->getNode(ISD::ANY_EXTEND, DL, XVT, Control); in matchBitExtract()
3500 SDValue Extract = CurDAG->getNode(X86ISD::BEXTR, DL, XVT, X, Control); in matchBitExtract()
3503 if (XVT != NVT) { in matchBitExtract()
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp3198 EVT XVT = X.getValueType(); in optimizeSetCCOfSignedTruncationCheck() local
3233 assert(XVT.isInteger()); in optimizeSetCCOfSignedTruncationCheck()
3234 NewCond = getSetCCInverse(NewCond, XVT); in optimizeSetCCOfSignedTruncationCheck()
3247 assert(KeptBits > 0 && KeptBits < XVT.getSizeInBits() && "unreachable"); in optimizeSetCCOfSignedTruncationCheck()
3252 XVT, KeptBits)) in optimizeSetCCOfSignedTruncationCheck()
3255 const unsigned MaskedBits = XVT.getSizeInBits() - KeptBits; in optimizeSetCCOfSignedTruncationCheck()
3256 assert(MaskedBits > 0 && MaskedBits < XVT.getSizeInBits() && "unreachable"); in optimizeSetCCOfSignedTruncationCheck()
3260 SDValue ShiftAmt = DAG.getConstant(MaskedBits, DL, XVT); in optimizeSetCCOfSignedTruncationCheck()
3261 SDValue T0 = DAG.getNode(ISD::SHL, DL, XVT, X, ShiftAmt); in optimizeSetCCOfSignedTruncationCheck()
3262 SDValue T1 = DAG.getNode(ISD::SRA, DL, XVT, T0, ShiftAmt); in optimizeSetCCOfSignedTruncationCheck()
DDAGCombiner.cpp4652 EVT XVT = X.getValueType(); in hoistLogicOpWithSameOpcodeHands() local
4661 if (XVT != Y.getValueType()) in hoistLogicOpWithSameOpcodeHands()
4666 !TLI.isOperationLegalOrCustom(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
4671 !TLI.isTypeDesirableForOp(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
4674 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands()
4685 if (XVT != Y.getValueType()) in hoistLogicOpWithSameOpcodeHands()
4688 if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
4692 if (TLI.isZExtFree(VT, XVT) && TLI.isTruncateFree(XVT, VT)) in hoistLogicOpWithSameOpcodeHands()
4694 if (!TLI.isTypeLegal(XVT)) in hoistLogicOpWithSameOpcodeHands()
4696 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp2932 EVT XVT = X.getValueType(); in optimizeSetCCOfSignedTruncationCheck() local
2967 assert(XVT.isInteger()); in optimizeSetCCOfSignedTruncationCheck()
2968 NewCond = getSetCCInverse(NewCond, XVT); in optimizeSetCCOfSignedTruncationCheck()
2981 assert(KeptBits > 0 && KeptBits < XVT.getSizeInBits() && "unreachable"); in optimizeSetCCOfSignedTruncationCheck()
2986 XVT, KeptBits)) in optimizeSetCCOfSignedTruncationCheck()
2989 const unsigned MaskedBits = XVT.getSizeInBits() - KeptBits; in optimizeSetCCOfSignedTruncationCheck()
2990 assert(MaskedBits > 0 && MaskedBits < XVT.getSizeInBits() && "unreachable"); in optimizeSetCCOfSignedTruncationCheck()
2994 SDValue ShiftAmt = DAG.getConstant(MaskedBits, DL, XVT); in optimizeSetCCOfSignedTruncationCheck()
2995 SDValue T0 = DAG.getNode(ISD::SHL, DL, XVT, X, ShiftAmt); in optimizeSetCCOfSignedTruncationCheck()
2996 SDValue T1 = DAG.getNode(ISD::SRA, DL, XVT, T0, ShiftAmt); in optimizeSetCCOfSignedTruncationCheck()
DDAGCombiner.cpp4379 EVT XVT = X.getValueType(); in hoistLogicOpWithSameOpcodeHands() local
4388 if (XVT != Y.getValueType()) in hoistLogicOpWithSameOpcodeHands()
4393 !TLI.isOperationLegalOrCustom(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
4398 !TLI.isTypeDesirableForOp(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
4401 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands()
4412 if (XVT != Y.getValueType()) in hoistLogicOpWithSameOpcodeHands()
4415 if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
4419 if (TLI.isZExtFree(VT, XVT) && TLI.isTruncateFree(XVT, VT)) in hoistLogicOpWithSameOpcodeHands()
4421 if (!TLI.isTypeLegal(XVT)) in hoistLogicOpWithSameOpcodeHands()
4423 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DTargetLowering.h586 virtual bool shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
/external/llvm-project/llvm/include/llvm/CodeGen/
DTargetLowering.h721 virtual bool shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp3085 EVT XVT = X.getValueType(); in performShlCombine() local
3086 SDValue Shl = DAG.getNode(ISD::SHL, SL, XVT, X, SDValue(RHS, 0)); in performShlCombine()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp3091 EVT XVT = X.getValueType(); in performShlCombine() local
3092 SDValue Shl = DAG.getNode(ISD::SHL, SL, XVT, X, SDValue(RHS, 0)); in performShlCombine()
/external/cldr/tools/java/org/unicode/cldr/util/data/external/
D2013-1_UNLOCODE_CodeListPart1.csv41988 ,"FR","XVT","Saint-Victor-la-Coste","Saint-Victor-la-Coste","30","--3-----","RQ","1101",,"4440N 004…
43493 ,"FR","VIR","Vitre","Vitre","35","--3-----","RL","9806","XVT",,
D2013-1_UNLOCODE_CodeListPart3.csv25984 ,"US","XVT","Vincentown","Vincentown","NJ","--3--6--","RL","0701",,"3956N 07545W",""