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Searched refs:X_ADDR (Results 1 – 7 of 7) sorted by relevance

/external/llvm-project/llvm/test/Transforms/Attributor/ArgumentPromotion/
D2008-02-01-ReturnAttrs.ll50 ; IS__TUNIT_OPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
51 ; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4
52 …lias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[X_ADDR]]) [[ATTR2:#.*]]
59 ; IS__TUNIT_NPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
60 ; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4
61 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[X_ADDR]], align 4
69 ; IS__CGSCC_OPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
70 ; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4
71 …lias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[X_ADDR]]) [[ATTR2:#.*]]
78 ; IS__CGSCC_NPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
[all …]
/external/llvm-project/llvm/test/Transforms/ArgumentPromotion/
D2008-02-01-ReturnAttrs.ll19 ; CHECK-NEXT: [[X_ADDR:%.*]] = alloca i32
20 ; CHECK-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4
21 ; CHECK-NEXT: [[X_ADDR_VAL:%.*]] = load i32, i32* [[X_ADDR]], align 4
/external/llvm-project/llvm/test/Transforms/Attributor/
Dnorecurse.ll182 ; IS__TUNIT____-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
183 ; IS__TUNIT____-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4
184 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[X_ADDR]], align 4
197 ; IS__CGSCC_OPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
198 ; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4
199 ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[X_ADDR]], align 4
211 ; IS__CGSCC_NPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
212 ; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4
213 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[X_ADDR]], align 4
/external/llvm-project/clang/test/utils/update_cc_test_checks/Inputs/
Dbasic-cplusplus.cpp.expected33 // CHECK-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
35 // CHECK-NEXT: store i32 [[X:%.*]], i32* [[X_ADDR]], align 4
37 // CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[X_ADDR]], align 4
/external/llvm-project/llvm/test/Transforms/DeadStoreElimination/MSSA/
Dsimple.ll173 ; CHECK-NEXT: [[X_ADDR:%.*]] = alloca i8*, align 8
174 ; CHECK-NEXT: store i8* [[X:%.*]], i8** [[X_ADDR]], align 8
175 ; CHECK-NEXT: [[TMP_0:%.*]] = va_arg i8** [[X_ADDR]], double
/external/llvm-project/llvm/test/Transforms/DeadStoreElimination/MemDepAnalysis/
Dsimple.ll185 ; CHECK-NEXT: [[X_ADDR:%.*]] = alloca i8*, align 8
186 ; CHECK-NEXT: store i8* [[X:%.*]], i8** [[X_ADDR]], align 8
187 ; CHECK-NEXT: [[TMP_0:%.*]] = va_arg i8** [[X_ADDR]], double
/external/mesa3d/src/mesa/x86/
Dassyntax.h993 #define X_ADDR(a) OFFSET a macro